w83194br-730 Winbond Electronics Corp America, w83194br-730 Datasheet - Page 4

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w83194br-730

Manufacturer Part Number
w83194br-730
Description
166mhz Clock For Sis Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
4.3 I
SDATA*
SDCLK*
4.4 Fixed Frequency Outputs
REF0 ^/ &AGPSEL
REF1 ^/ &FS3
24_48MHz / &Mode
48MHz / &FS0
4.5 Power Pins
VddR
VddAGP
VddLCPU
VddP
VddSD
Vdd48
Vss
2
C Control Interface
SYMBOL
SYMBOL
SYMBOL
4,14,18,19,29,32,39,4
43,35,29,25
PIN
PIN
23
24
21
20
2
3
PIN
15
19
48
1
7
4
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
- 4 -
Power supply for Ref [0:1] crystal and core logic.
Power supply for AGP output, 3.3V.
Power supply for CPUC0,T0,CS_C1, either 2.5V or 3.3V.
Power supply for PCICLK[0:5], 3.3V.
Power supply for SDRAM[0:12], and CPU PLL core,
nominal 3.3V.
Power for 24 & 48MHz output buffers and fixed PLL core.
Circuit Ground.
Serial data of I
Serial clock of I
14.318MHz reference clock. This REF output is the
atched input for &AGPSEL at initial power up for H/W
selecting the output frequency of AGP clocks.
14.318MHz reference clock.
Latched input for FS3 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
24_48MHz output clock, selected by pin16.
Latched Input. &Mode=0, Pin 27,28,30,31 are SDRAM
clocks; &Mode=0, Pin27,28,29,31 areCPU_STOP#,
SDRAM_STOP#, PCI_STOP#,PD#
48MHz output for USB during normal operation.
Latched input for FS0 at initial power up for H/W
selecting the output frequency of CPU, SDRAM and
PCI clocks.
2
C 2-wire control interface
2
C 2-wire control interface
Publication Release Date:Oct. 2000
FUNCTION
FUNCTION
FUNCTION
W83194BR-730
PRELIMINARY
Revision 0.60

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