w83194br-730 Winbond Electronics Corp America, w83194br-730 Datasheet - Page 5

• Manufacturer Part Number: w83194br-730
• Description: 166mhz Clock For Sis Chipset
• Manufacturer: Winbond Electronics Corp America

5.0 FREQUENCY SELECTION BY HARDWARE
6.0 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the default state at true
power up. "Command Code" byte and "Byte Count" byte must be sent following the acknowledge of
the Address Byte. Although the data (bits) in these two bytes are considered "don't care", they must be
sent and will be acknowledge.
Register 2, ....) will be valid and acknowledged.
Bytes sequence order for I
Set R/W to 1 when Read back”, the data sequence is as follows :
FS3 FS2 FS1
Clock Address
A(6:0) & R/W
Clock Address
A(6:0) & R/W
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
1
1
1
0
0
1
1
0
1
1
0
0
0
0
1
Ack
Ack
FS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
2
C controller :
8 bits dummy
Command code
(MHz)
VCO
336
333
330
192
400
400
300
400
500
372
400
400
300
332
360
192
Byte 0
After that, the sequence described below (Register 0, Register 1,
(MHz)
CPU
112
111
110
100
100
100
100
125
124
133
133
150
166
90
48
45
Ack
Ack
- 5 -
SDRAM
(MHz)
66.6
112
166
165
100
133
150
100
124
100
133
150
166
90
48
60
8 bits dummy
Byte count
Byte 1
(MHz)
33.6
33.3
33.0
33.3
33.3
30.0
33.3
31.3
33.3
33.3
33.3
PCI
31
30
30
32
30
Publication Release Date:Oct. 2000
Ack
Ack
AGPSEL=0
W83194BR-730
(MHz)
66.6
66.6
66.6
67.2
62.5
66.6
66.6
66.6
66.6
60
62
60
66
60
64
60
Byte0,1,2...
until Stop
Byte2, 3, 4...
until Stop
PRELIMINARY
Revision 0.60
AGPSEL=1
(MHz)
46.5
55.6
55.6
50
50
50
50
56
50
50
50
50
55
45
48
45