w83194br-619 Winbond Electronics Corp America, w83194br-619 Datasheet - Page 14

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w83194br-619

Manufacturer Part Number
w83194br-619
Description
Winbond Clock Generator For Intel P4 Springdale Series Chipset P4 Springdale Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.6
MODE1/0
CPU over clock
SRC over clock
AGP/PCI over clock
Spreading
7.7
BIT
7
6
5
4
3
2
1
0
Table-1: Clock output mode selection
Register 5: Watchdog Control Register (Default =C0H)
MODE
WD_TIMEOUT
SAF_FREQ [4]
SAF_FREQ [3]
SAF_FREQ [2]
SAF_FREQ [1]
SAF_FREQ [0]
CLOCK GEN. FOR INTEL P4 SPRINGDALE/PRESCOTT SERIES CHIPSET
EN_WD
SEL24
NAME
PWD
NORMAL MODE
X
1
0
0
0
0
0
0
All clocks are
Byte 8 & 9
Byte 8 & 9
Byte 8 & 9
Effective
Pin 22
1: 24 MHz, 0: 48 MHz. (Default)
Default value follow hardware trapping data on SEL24_48# pin.
Program this bit =>
1: Enable Watchdog Timer feature.
0: Disable Watchdog Timer feature.
Read-back this bit =>
During timer count down the bit read back to 1.
If count to zero, this bit read back to 0
Read Back only. Timeout Flag.
1: Watchdog has ever started and counts to zero.
0: Watchdog is restarted and counting.
These bits will be reloaded in Reg-0 to select frequency table. As the
watchdog is timeout and EN_SAFE_FREQ=1.
00
24 / 48 MHz output selection
W83194BR-619/W83194BG-619
CPU is effective Only.
- 10 -
CPU OVER CLOCK
(asynchronous)
(asynchronous)
Byte 4 & 10
Byte 4 & 10
Byte 8 & 9
MODE
01
DESCRIPTION
CPU and SRC are Effective.
OVER CLOCK MODE
(asynchronous)
Byte 4 & 10
Byte 8 & 9
Byte 8 & 9
CPU/SRC
10

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