idt49c460cjb Integrated Device Technology, idt49c460cjb Datasheet - Page 17

• Manufacturer Part Number: idt49c460cjb
• Description: 32-bit Cmos Error Detection And Correction Unit
• Manufacturer: Integrated Device Technology

IDT49C460/A/B/C/D/E
32-BIT CMOS ERROR DETECTION AND CORRECTION UNIT
DC ELECTRICAL CHARACTERISTICS (Cont’d.)
Commercial: T
V
NOTES:
5. I
6. Total Supply Current is the sum of the Quiescent current and the Dynamic current (at either CMOS or TTL input levels). For all conditions, the Total Supply
CMOS TESTING CONSIDERATIONS
account when applying high-speed CMOS products to the
automatic test environment. Large output currents are being
switched in very short periods and proper testing demands
that test set-ups have minimized inductance and guaranteed
zero voltage grounds. The techniques listed below will assist
the user in obtaining accurate testing results:
1) All input pins should be connected to a voltage potential
2) Placement and value of decoupling capacitors is critical.
Symbol
LC
I
I
I
I
CCQ
CCT
CCD
CC
Current can be calculated by using the following equation:
I
D
N
f
CCT
CC
OP
Special test board considerations must be taken into
during testing. If left floating, the device may oscillate,
causing improper device operation and possible latchup.
Each physical set-up has different electrical
characteristics and it is recommended that various
decoupling capacitor sizes be experimented with.
Capacitors should be positioned using the minimum lead
lengths. They should also be distributed to decouple
power supply lines and be placed as close as possible to
the DUT power pins.
H
T
= 0.2V; V
= Number of dynamic inputs driven at TTL levels.
= Data duty cycle TTL high period (V
= I
= Operating frequency in Megahertz.
is derived by measuring the total current with all the inputs tied together at 3.4V, subtracting out I
CCQ
Quiescent Power Supply Current
(CMOS Inputs)
Quiescent Input Power Supply
Current (per Input @ TTL High)
Dynamic Power Supply Current
Total Power Supply Current
+ I
CCT
HC
A
(N
= 0 C to +70 C, V
= V
T
x D
CC
Parameter
H
) + I
– 0.2V
CCD
(f
OP
)
IN
CC
(6)
= 3.4V).
= 5.0V
(5)
V
V
f
V
V
V
Outputs Open,
V
Outputs Open,
50 % Duty cycle
V
V
Outputs Open,
50 % Duty cycle
V
OP
CC
HC
CC
CC
HC
CC
HC
CC
IH
= 0; Outputs Disabled
= 3.4V, V
= Max.; All Inputs
= Max., V
= Max.
= Max., f
= Max., f
5%; Military: T
V
V
V
IN
IN
IN
, V
, V
, V
IN
IN
IN
OP
OP
IL
IN
OE
OE
OE
= 0.4V
= 10MHz
= 10MHz
V
= 3.4V, f
V
V
Test Conditions
11.6
LC
LC
LC
= L
= L
= L
3) Device grounding is extremely critical for proper device
4) To guarantee data sheet compliance, the input thresholds
A
= –55 C to +125 C, V
OP
testing. The use of multi-layer performance boards with
radial decoupling between power and ground planes is
necessary. The ground plane must be sustained from the
performance board to the DUT interface board and wiring
unused interconnect pins to the ground plane is
recommended. Heavy gauge stranded wire should be
used for power wiring, with twisted pairs being
recommended for minimized inductance.
should be tested per input pin in a static environment. To
allow for testing and hardware-induced noise, IDT
recommends using V
= 0
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MIL.
COM'L.
MIL.
COM'L.
MIL.
COM'L.
CCQ
CC
, then dividing by the total number of inputs.
IL
= 5.0V
0V and V
Min.
—
—
—
—
—
—
—
—
10%
IH
Typ.
3.0
0.3
60
60
70
70
6
6
3V for AC tests.
Max.
0.75
110
125
10
10
80
95
7
2584 tbl 27
Input
MHz
Unit
mA/
mA/
17
mA
mA