nb3n853501e ON Semiconductor, nb3n853501e Datasheet - Page 5

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nb3n853501e

Manufacturer Part Number
nb3n853501e
Description
3.3 V Lvttl/lvcmos 2 1 Mux To 4 Lvpecl Differential Clock Fanout Buffer Outputs With Clock Enable And Clock Select
Manufacturer
ON Semiconductor
Datasheet
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
6. Outputs terminated 50 W to V
Table 6. AC CHARACTERISTICS
tSKEW
tSKEW
supply allows a direct connection to an oscilloscope 50 W impedance input module. Also reference AND8020.
tSKEW
(V
Symbol
Figure 4. Typical Test Setup and Termination for Evaluation. The V
F
DD
t
t
t
MAX
PD
JIT
r
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
/t
/2) to differential Output crosspoints, see Figure 5.
f
O−O
D−D
DC
Maximum Operating Frequency
Propagation Delay
Duty Cycle Skew same path similar conditions at 50 MHz
Output to Output Skew Within A Device
Device−to−Device Skew similar path and conditions
Additive Phase Noise Jitter (RMS) @ 155.52 MHz (Integrated from 12 kHz to
20 MHz) See Figure 6.
Output rise and fall times @ 266 MHz (20% and 80% points)
CC
− 2.0 V, see Figure 4. Input levels of 0.8 V and 2.4 V unless stated otherwise. Measured from Input Midpoint
V
CC
= 3.3 ±5% V (3.135 to 3.465 V), GND = 0 V, T
Characteristic
http://onsemi.com
5
CC
of 2.0 V and V
A
= −40°C to +85°C (Note 6)
Min
240
0.9
48
0
EE
of −1.3 ±0.165 V Split
0.062
Typ
50
Max
266
250
700
2.0
52
30
MHz
Unit
ns
ps
ps
ps
ps
%

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