nb4n441 ON Semiconductor, nb4n441 Datasheet - Page 3

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nb4n441

Manufacturer Part Number
nb4n441
Description
3.3v Serial Input Multiprotocol Pll Clock Synthesizer, Differential Lvpecl Output
Manufacturer
ON Semiconductor
Datasheet

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*Pins will default HIGH when left Open
**Pins will default LOW when left Open
Table 1. PIN DESCRIPTION
11, 12, 13, 24
1, 6, 9, 18, 19
2, 4, 5, 10, 14
22, 23
Pin
20
15
16
17
21
3
8
7
CLK / XTAL1,
SCLOCK**
VCC_PLL
LOCKED
SLOAD**
SDATA**
CLKOUT
CLKOUT
XTAL2
Name
GND
V
OE*
NC
EP
CC
LVTTL/LVCMOS Single Ended
Clock or XTAL Inputs
LVTTL Lock Output
PLL Power Supply
LVTTL / LVCMOS,
LVTTL / LVCMOS
LVTTL / LVCMOS
Serial Clock Input
Serial Load Input
Serial Data Input
LVPECL Output
Power Supply
LVTTL Input
Ground
I/O
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NB4N441
3
Positive supply voltage.
Positive supply voltage for the PLL.
Ground.
When Low, this output provides indication that the PLL is
locked and the device is in proper operating mode. When
High, the PLL is out of lock.
No Connect.
The crystal is connected between the XTAL1 and XTAL2 pin.
If driving single−ended, use XTAL1 and leave XTAL2
floating.
Serial Load.
Serial Data Input.
Serial Clock Input.
Synchronous Output Enable. When OE is HIGH or left
OPEN, the outputs are enabled. When OE is LOW, the
outputs are disabled.
Differential LVPECL Clock Outputs, Typically terminated with
50 W resistor to VCC – 2.0 V.
The Exposed Pad on the 24 pin QFN package bottom is
thermally connected to the die for improved heat transfer out
of package. The pad is not electrically connected to the die,
but is recommended to be electrically connected to GND on
the PC board.
Description

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