nb4n441 ON Semiconductor, nb4n441 Datasheet - Page 8

• Manufacturer Part Number: nb4n441
• Description: 3.3v Serial Input Multiprotocol Pll Clock Synthesizer, Differential Lvpecl Output
• Manufacturer: ON Semiconductor

Power Supply Filtering
such, it exhibits some sensitivities that would not necessarily
be seen on a fully digital product. Analog circuitry is
naturally susceptible to random noise, especially if this noise
is seen on the power supply pins. The NB4N441 provides
separate power supplies for the digital circuitry (V
the internal PLL (PLL_V
this design technique is to try and isolate the high switching
noise of the digital outputs from the relatively sensitive
internal analog phase−locked loop. In a controlled
environment such as an evaluation board, this level of
isolation is sufficient. However, in a digital system
environment where it is more difficult to minimize noise on
The NB4N441 is a mixed analog/digital product and as
PLL_V
V
CC
CC
Figure 4. Power Supply Filter
0.01 mF
R
S
CC
47 mF
= 5 W
) of the device. The purpose of
3.3 V or
0.01 mF
5.0 V
3.3 V or
5.0 V
L=1000 mH
R=15 W
CC
http://onsemi.com
) and
NB4N441
8
the power supplies, a second level of isolation may be
required. The simplest form of isolation is a power supply
filter on the PLL_V
illustrates a typical power supply filter scheme. The
NB4N441 is most susceptible to noise with spectral content
in the 1 kHz to 1 MHz range. Therefore, the filter should be
designed to target this range. The key parameter that needs
to be met in the final filter design is the DC voltage drop that
will be seen between the V
of the NB4N441. From the data sheet, the PLL_V
(the current sourced through the PLL_V
26 mA. Assuming that a minimum of 2.9 V must be
maintained on the PLL_V
can be tolerated when a 3.3 V V
resistor shown in Figure 4 must have a resistance of 5 W
Max to meet the voltage drop criteria. The RC filter pictured
will provide a broadband filter with approximately 100:1
attenuation for noise whose spectral content is above
20 kHz. As the noise frequency crosses the series resonant
point of an individual capacitor, it’s overall impedance
begins to look inductive and thus increases with increasing
frequency. The parallel capacitor combination shown
ensures that a low impedance path to ground exists for
frequencies well above the bandwidth of the PLL. The level
of required filtering is subject to further optimization and
simplification. All the V
V
same GND plane.
CC
plane. All the ground pins (GND) are connected to the
CC
CC
Pin for the NB4N441. Figure 4
CC
CC
pins are connected to the same
pin, very little DC voltage drop
supply and the PLL_V
CC
supply is used. The
CC
Pin) is typically
CC
current
CC
pin