74hc2gu04 NXP Semiconductors, 74hc2gu04 Datasheet
74hc2gu04
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74hc2gu04 Summary of contents
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... Dual unbuffered inverter Rev. 01 — 6 October 2006 1. General description The 74HC2GU04 is a high-speed Si-gate CMOS device. The 74HC2GU04 provides two unbuffered inverters. 2. Features I Wide supply voltage range from 2 6 Complies with JEDEC standard no High noise immunity I ESD protection: ...
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... GND 001aaf305 Description data input ground (0 V) data input data output supply voltage data output Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter A Y mna045 Fig 3. Logic diagram (one gate) © NXP B.V. 2006. All rights reserved ...
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... Conditions except for Schmitt trigger inputs except for Schmitt trigger inputs Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter Min Max Unit 0.5 +7 [1] - +50 mA [1] ...
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... 4 5 Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter Min Typ Max Unit 1.7 1 3.6 2 4.8 3 0.9 0 2.1 0 2.9 1.2 V 1.9 2 4.4 4 5.9 6 ...
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... 4 6 4 5 GND 6 GND 6 Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter Min Typ Max Unit - 0.15 0. 0. 10 ...
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... W where input M GND t PHL output THL Table 9. Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter +125 C Min Typ Max Min Max ( ...
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... PULSE D.U bias = 560 0.47 F input output kHz) Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter Output open mgk563 of the pulse generator. o Test PHL PLH ...
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... (mA) O (V) 1.6 1.2 0.8 0 2.0 V Fig 10. Typical transfer characteristics V CC Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter mnb124 ( 4 © NXP B.V. 2006. All rights reserved. mnb122 5 ...
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... NXP Semiconductors Fig 11. Typical transfer characteristics V 15. Application information Some applications for the 74HC2GU04 are: • Linear amplifier (see • Crystal oscillator (see Remark: All values given are typical values unless otherwise specified. Fig 12. Linear amplifier application 74HC2GU04_1 ...
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... V or minimum required minimum influence minimum required minimum influence minimum required minimum influence by V Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter C2 mna053 or average minimum ...
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... scale 2.2 1.35 2.2 1.3 0.65 1.8 1.15 2.0 REFERENCES JEDEC JEITA SC-88 Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter detail 0.45 0.25 0.2 0.2 0.1 0.15 0.15 EUROPEAN PROJECTION SOT363 ISSUE DATE 04-11-08 06-03-16 © NXP B.V. 2006. All rights reserved. ...
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... scale 3.1 1.7 3.0 0.6 0.95 2.7 1.3 2.5 0.2 REFERENCES JEDEC JEITA SC-74 Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter detail 0.33 0.2 0.2 0.1 0.23 EUROPEAN PROJECTION SOT457 ISSUE DATE 05-11-07 06-03-16 © NXP B.V. 2006. All rights reserved. ...
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... Device Under Test 18. Revision history Table 14. Revision history Document ID Release date 74HC2GU04_1 20061006 74HC2GU04_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter Supersedes - © NXP B.V. 2006. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 01 — 6 October 2006 74HC2GU04 Dual unbuffered inverter © NXP B.V. 2006. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2006. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 6 October 2006 Document identifier: 74HC2GU04_1 ...