hef4059b NXP Semiconductors, hef4059b Datasheet - Page 2

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hef4059b

Manufacturer Part Number
hef4059b
Description
Programmable Divide-by-n Counter
Manufacturer
NXP Semiconductors
Datasheet

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DESCRIPTION
The HEF4059B is a divide-by-n counter which can be
programmed to divide an input frequency by any number
n from 3 to 15 999. The output signal is a one clock-cycle
FAMILY DATA, I
See Family Specifications
January 1995
Programmable divide-by-n counter
DD
Fig.2 Pinning diagram.
LIMITS category LSI
Fig.1 Functional block diagram.
2
wide pulse and occurs at a rate equal to the input
frequency divided by n . The single output (O) has TTL
drive capability. The down counter is preset by means of
16 jam inputs (J1 to J16); continued on next page.
PINNING
CP
K
J
EL
O
HEF4059BP(N): 24-lead DIL; plastic (SOT101-1)
HEF4059BD(F): 24-lead DIL; ceramic (cerdip) (SOT94)
HEF4059BT(D): 24-lead SO; plastic (SOT137-1)
( ): Package Designator North America
1
a
, K
to J
b
, K
16
c
clock input
mode select inputs
programmable jam inputs (BCD)
latch enable input
divide-by-n output
Product specification
HEF4059B
LSI

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