adf4196 Analog Devices, Inc., adf4196 Datasheet - Page 4

• Manufacturer Part Number: adf4196
• Description: Low Phase Noise, Fast Settling, 6 Ghz Pll Frequency Synthesizer
• Manufacturer: Analog Devices, Inc.

ADF4196
Parameter
SW1, SW2, AND SW3
NOISE CHARACTERISTICS
1
2
3
4
5
TIMING CHARACTERISTICS
AV
R
Table 2.
Parameter
t
t
t
t
t
t
t
Timing Diagram
1
2
3
4
5
6
7
DATA
Choose a prescaler value that ensures that the frequency on the RF input is less than the maximum allowable prescaler frequency (750 MHz).
f
f
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log(N) (where N is the N divider
value) and 10 log(f
The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency,
f
ADIsimPLL™.
SET
REF IN
REF IN
RF
On Resistance
Output
Phase Noise
CLK
, and at an offset frequency, f, is given by PN = P
DD
LE
LE
= 2.4 kΩ; dBm referred to 50 Ω; T
SW1 and SW2
SW3
900 MHz
1800 MHz
Normalized Phase Noise Floor
Normalized 1/f Noise (PN
= 26 MHz; f
= 13 MHz; f
= DV
(PN
SYNTH
DD
2
1, DV
STEP
STEP
)
3
4
PFD
= 200 kHz; f
= 200 kHz; f
). PN
(MSB)
DB23
DD
2, DV
SYNTH
t
1
= PN
RF
RF
DD
= 900 MHz; loop bandwidth = 40 kHz.
= 1800 MHz; loop bandwidth = 60 kHz.
1_f
3 = 3 V ± 10%; V
TOT
)
5
− 10 log(f
t
2
A
DB22
= T
PFD
Min
Limit
10 ns min
10 ns min
10 ns min
15 ns min
15 ns min
10 ns min
15 ns min
) − 20 log(N).
1_f
MIN
+ 10 log(10 kHz/f) + 20 log(f
t
3
to T
P
1, V
MAX
P
2 = 5 V ± 10%; V
, unless otherwise noted. Operating temperature = −40°C to +85°C.
Typ
65
75
−108
−102
−216
−110
(CONTROL BIT C3)
Figure 2. Timing Diagram
DB2 (LSB)
Rev. B | Page 4 of 28
t
Max
RF
4
/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in
P
3 = 5.35 V ± 5%; A
t
5
Description
LE setup time
DATA to CLK setup time
DATA to CLK hold time
CLK high duration
CLK low duration
CLK to LE setup time
LE pulse width
Unit
Ω
Ω
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
(CONTROL BIT C2)
DB1 (LSB)
GND
Test Conditions/Comments
At 5 kHz offset and 26 MHz PFD frequency
At 5 kHz offset and 13 MHz PFD frequency
At VCO output with dither off, PLL loop
bandwidth = 500 kHz
Measured at 10 kHz offset, normalized to 1 GHz
1, A
GND
2 = D
GND
1, D
(CONTROL BIT C1)
GND
DB0 (LSB)
2, D
t
t
6
7
Data Sheet
GND
3 = 0 V;