lm555jan National Semiconductor Corporation, lm555jan Datasheet - Page 11

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lm555jan

Manufacturer Part Number
lm555jan
Description
Timer
Manufacturer
National Semiconductor Corporation
Datasheet
Note that this circuit will not oscillate if R
is greater than 1/2
B
R
because the junction of R
and R
cannot bring pin 2 down
A
A
B
to 1/3 V
and trigger the lower comparator.
CC
ADDITIONAL INFORMATION
Adequate power supply bypassing is necessary to protect
associated circuitry. Minimum recommended is 0.1μF in par-
allel with 1μF electrolytic.
Lower comparator storage time can be as long as 10μs when
pin 2 is driven fully to ground for triggering. This limits the
monostable pulse width to 10μs minimum.
Delay time reset to output is 0.47μs typical. Minimum reset
pulse width must be 0.3μs, typical.
Pin 7 current switches within 30ns of the output (pin 3) volt-
age.
20153718
FIGURE 14. 50% Duty Cycle Oscillator
11
www.national.com
201537 Version 3 Revision 1
Print Date/Time: 2010/10/01 00:30:58

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