74lv02bq NXP Semiconductors, 74lv02bq Datasheet

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74lv02bq

Manufacturer Part Number
74lv02bq
Description
Quad 2-input Nor Gate
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features
3. Ordering information
Table 1.
Type number
74LV02D
74LV02PW
74LV02BQ
Ordering information
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
The 74LV02 is a low-voltage Si-gate CMOS device that is pin and function compatible with
74HC02 and 74HCT02.
The 74LV02 provides a quad 2-input NOR function.
74LV02
Quad 2-input NOR gate
Rev. 04 — 20 December 2007
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
Typical output ground bounce < 0.8 V at V
Typical HIGH-level output voltage (V
T
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
amb
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
= 25 C
SO14
TSSOP14
DHVQFN14 plastic dual in-line compatible thermal enhanced very
Description
plastic small outline package; 14 leads;
body width 3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
thin quad flat package; no leads; 14 terminals;
body 2.5
3
CC
OH
0.85 mm
) undershoot: > 2 V at V
= 2.7 V and V
CC
= 3.3 V and T
CC
= 3.6 V
amb
= 25 C
CC
Product data sheet
= 3.3 V and
Version
SOT108-1
SOT402-1
SOT762-1

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74lv02bq Summary of contents

Page 1

... Ordering information Table 1. Ordering information Type number Package Temperature range Name 74LV02D +125 C 74LV02PW +125 C 74LV02BQ +125 Description SO14 plastic small outline package; 14 leads; body width 3.9 mm TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad fl ...

Page 2

... NXP Semiconductors 4. Functional diagram mna216 Fig 1. Logic symbol 5. Pinning information 5.1 Pinning GND 7 Fig 4. Pin configuration SO14 and TSSOP14 5.2 Pin description Table 2. Pin description ...

Page 3

... NXP Semiconductors Table 2. Pin description …continued Symbol Pin GND Functional description Table 3. Function table H = HIGH voltage level LOW voltage level don’t care Input Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134) ...

Page 4

... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate [1] The static characteristics are guaranteed from ...

Page 5

... NXP Semiconductors Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I supply current CC I additional supply current CC C input capacitance I [1] Typical values are measured at T 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V ...

Page 6

... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical voltage output levels that occur with the output load Fig 6. The input (nA, nB) to output (nY) propagation delays Table 8. Measurement points Supply voltage V CC < 2 3.6 V 4.5 V Test data is given in Table 9. Defi ...

Page 7

... NXP Semiconductors 12. Package outline SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 8

... NXP Semiconductors TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 9

... NXP Semiconductors DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 10

... Document ID Release date 74LV02_4 20071220 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section • Section • ...

Page 11

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 12

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Functional description . . . . . . . . . . . . . . . . . . . 3 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Abbreviations ...

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