pcf8593 NXP Semiconductors, pcf8593 Datasheet - Page 4
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pcf8593
Manufacturer Part Number
pcf8593
Description
Low Power Clock/calendar
Manufacturer
NXP Semiconductors
Datasheet
1.PCF8593.pdf
(28 pages)
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Philips Semiconductors
5 BLOCK DIAGRAM
6 PINNING
1997 Mar 25
OSCI
OSCO
RESET
V
SDA
SCL
INT
V
handbook, full pagewidth
SYMBOL PIN
SS
DD
Low power clock/calendar
1
2
3
4
5
6
7
8
RESET
OSCO
oscillator input, 50 Hz or event-pulse
input
oscillator output
reset input (active LOW)
negative supply
serial data input/output
serial clock input
open drain interrupt output
(active LOW)
positive supply
OSCI
SDA
SCL
INT
1
2
7
3
6
5
V SS
DESCRIPTION
4
OSCILLATOR
INTERFACE
32.768 kHz
I C-BUS
RESET
2
V DD
Fig.1 Block diagram.
8
REGISTER
CONTROL
ADDRESS
100 : 128
DIVIDER
LOGIC
1 : 256
4
PCF8593
100 Hz
hundredths of a second
RESET
OSCO
weekdays/months
OSCI
V SS
alarm registers
control/status
alarm control
Fig.2 Pin configuration.
year/date
seconds
minutes
or RAM
hours
timer
1
2
3
4
PCF8593P
PCF8593T
MBD808
MBD809
00
01
07
08
0F
7
6
5
8
Product specification
V DD
SCL
SDA
INT
PCF8593