pcf8812 NXP Semiconductors, pcf8812 Datasheet - Page 27

• Manufacturer Part Number: pcf8812
• Description: 65 X 102 Pixels Matrix Lcd Driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
The required minimum value for the external capacitors in an application with the PCF8812 are as follows:
Higher capacitor values are recommended for ripple reduction.
16 BONDING PAD INFORMATION
The PCF8812 is manufactured using n-well CMOS technology. The substrate is at V
The pinning of the PCF8812 is optimized for single plane wiring, such as chip-on-glass display modules; display size:
65
16.1
Table 8 Bonding pad dimensions
Table 9 Bonding pad locations for PCF8812U/2DA/2
All x and y coordinates represent the position of the
centre of each pad (in m) with respect to the origin
(x/y = 0/0) of the chip (see Fig.20).
2004 Feb 23
Pad pitch
Pad size; aluminium
Bump dimensions
Wafer thickness; without bumps
RES_B
ROW 32
ROW 31
ROW 30
ROW 29
ROW 28
ROW 27
ROW 26
ROW 25
ROW 24
ROW 23
ROW 22
ROW 21
ROW 20
ROW 19
n.c.
n.c.
C
C
65
VLCD
VDD
102 pixels.
PCF8812U/2DA/2
; C
SYMBOL
= 100 nF (minimum)
102 pixels matrix LCD driver
VDD1
; C
VDD2
= 1 F (minimum).
NAME
PAD
10
11
12
13
14
15
16
17
1
2
3
4
5
6
7
8
9
+4819.5
+3483
+3843
+3906
+3969
+4032
+4095
+4158
+4221
+4284
+4347
+4410
+4473
+4536
+4599
+4662
+4788
COORDINATES
x
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
+841.1
841.1
y
27
63 m
56
42
381 ( 25) m
ROW 0
ROW 1
ROW 2
ROW 3
ROW 4
ROW 5
ROW 6
ROW 7
ROW 8
ROW 9
ROW 10
ROW 11
ROW 12
ROW 13
ROW 14
ROW 15
ROW 16
ROW 17
ROW 18
COL 0
90 m
81
SYMBOL
15 ( 3) m
DIMENSION
SS
potential.
PAD
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
+4441.5
+4315.5
+4252.5
+4189.5
+4126.5
+4063.5
+4000.5
+3496.5
+3433.5
+3370.5
+4504.5
+4378.5
+3937.5
+3874.5
+3811.5
+3748.5
+3685.5
+3622.5
+3559.5
+3244.5
Product specification
COORDINATES
x
PCF8812
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
841.1
y