m41t00s STMicroelectronics, m41t00s Datasheet - Page 8

• Manufacturer Part Number: m41t00s
• Description: Serial Access Real-time Clock
• Manufacturer: STMicroelectronics

M41T00S
READ Mode
In this mode the master reads the M41T00S slave
after setting the slave address (see
8., page
Bit (R/W=0) and the Acknowledge Bit, the word
address 'An' is written to the on-chip address
pointer. Next the START condition and slave ad-
dress are repeated followed by the READ Mode
Control Bit (R/W=1). At this point the master trans-
mitter becomes the master receiver. The data byte
which was addressed will be transmitted and the
master receiver will send an Acknowledge Bit to
the slave transmitter. The address pointer is only
incremented on reception of an Acknowledge
Clock. The M41T00S slave transmitter will now
place the data byte at address An+1 on the bus,
the master receiver reads and acknowledges the
new byte and the address pointer is incremented
to “An+2.”
Figure 7. Slave Address Location
8/23
9). Following the WRITE Mode Control
START
1
Figure
1
SLAVE ADDRESS
0
1
This cycle of reading consecutive addresses will
continue until the master receiver sends a STOP
condition to the slave transmitter.
The system-to-user transfer of clock data will be
halted whenever the address being read is a clock
address (00h to 06h). The update will resume due
to a Stop Condition or when the pointer increments
to any non-clock address (07h).
Note: This is true both in READ Mode and WRITE
Mode.
An alternate READ Mode may also be implement-
ed whereby the master reads the M41T00S slave
without first writing to the (volatile) address point-
er. The first address that is read is the last one
stored in the pointer (see
0
0
0
R/W
A
AI00602
Figure 9., page
9).