m41t00cap STMicroelectronics, m41t00cap Datasheet - Page 15

• Manufacturer Part Number: m41t00cap
• Description: Serial Access Real-time Clock With Integral Backup Battery
• Manufacturer: STMicroelectronics

M41T00CAP
4.1
4.2
Clock registers
The M41T00CAP has 8 internal registers which contain clock and calibration data. These
registers are memory locations which contain external (user accessible) and internal copies
of the data (usually referred to as BiPORT™ TIMEKEEPER cells). The external copies are
independent of internal functions except that they are updated periodically by the
simultaneous transfer of the incremented internal copy. The system-to-user transfer of clock
data will be halted whenever the address being read is a clock address (00h to 06h). The
update will resume either due to a stop condition or when the pointer increments to any non-
clock address (07h). Clock registers store data in BCD. The calibration register stores data
in binary format. The internal divider (or clock) chain will be reset upon the completion of a
WRITE to any clock address.
Calibrating the clock
The M41T00CAP is driven by a quartz-controlled oscillator with a nominal frequency of
32,768 Hz. The devices are tested not to exceed ±23 ppm (parts per million) oscillator
frequency error at 25°C, which equates to about ±1 minute per month (see
When the Calibration circuit is properly employed, accuracy improves to better than ±2 ppm
at 25°C. The oscillation rate of crystals changes with temperature. The M41T00CAP design
employs periodic counter correction. The calibration circuit adds or subtracts counts from
the oscillator divider circuit at the divide by 256 stage, as shown in
times pulses which are blanked (subtracted, negative calibration) or split (added, positive
calibration) depends upon the value loaded into the five calibration bits found in the
calibration register. Adding counts speeds the clock up, subtracting counts slows the clock
down. The calibration bits occupy the five lower order bits (D4-D0) in the calibration register
07h. These bits can be set to represent any value between 0 and 31 in binary form. Bit D5 is
a Sign Bit; '1' indicates positive calibration, '0' indicates negative calibration. Calibration
occurs within a 64 minute cycle. The first 62 minutes in the cycle may, once per minute, have
one second either shortened by 128 or lengthened by 256 oscillator cycles. If a binary '1' is
loaded into the register, only the first 2 minutes in the 64 minute cycle will be modified; if a
binary 6 is loaded, the first 12 will be affected, and so on. Therefore, each calibration step
has the effect of adding 512 or subtracting 256 oscillator cycles for every 125,829,120 actual
oscillator cycles, that is +4.068 or –2.034 ppm of adjustment per calibration step in the
calibration register (see
Hz, each of the 31 increments in the calibration byte would represent +10.7 or –5.35
seconds per month which corresponds to a total possible adjustment range of +5.5 or –2.75
minutes per month.
Two methods are available for ascertaining how much calibration a given M41T00CAP may
require. The first involves setting the clock, letting it run for a month and comparing it to a
known accurate reference and recording deviation over a fixed period of time. Calibration
values, including the number of seconds lost or gained in a given period, can be found in
application note AN934, “TIMEKEEPER
end user the ability to calibrate the clock as the environment requires, even if the final
product is packaged in a non-user serviceable enclosure. The designer could provide a
simple utility that accesses the calibration byte. The second approach is better suited to a
manufacturing environment, and involves the use of the FT/OUT pin. The pin will toggle at
512 Hz, when the stop bit (ST, D7 of 00h) is '0,' and the frequency test bit (FT, D6 of 07h) is
'1.' Any deviation from 512 Hz indicates the degree and direction of oscillator frequency shift
at the test temperature. For example, a reading of 512.010124 Hz would indicate a +20 ppm
oscillator frequency error, requiring a –10 (XX001010) to be loaded into the calibration byte
Figure
11). Assuming that the oscillator is running at exactly 32,768
®
calibration.” This allows the designer to give the
Figure
11. The number of
Clock operation
Figure
10).
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