max5961 Maxim Integrated Products, Inc., max5961 Datasheet - Page 38

• Manufacturer Part Number: max5961
• Description: 0 To 16v, Quad, Hot-swap Controller With 10-bit Current And Voltage Monitor
• Manufacturer: Maxim Integrated Products, Inc.

0 to 16V, Quad, Hot-Swap Controller
with 10-Bit Current and Voltage Monitor
The MAX5961 features an I
consisting of a serial-data line (SDA) and a serial-clock
line (SCL). SDA and SCL allow bidirectional communica-
tion between the MAX5961 and the master device at
clock rates from 100kHz to 400kHz. The I
have several devices (e.g., more than one MAX5961, or
other I
simultaneously. The A0 and A1 inputs set one of nine
possible I
The 2-wire communication is fully compatible with exist-
ing 2-wire serial-interface systems; Figure 5 shows the
interface timing diagram. The MAX5961 is a
transmit/receive slave-only device, relying upon a mas-
38
Table 51. Slave Address Settings
Figure 5. Serial-Interface Timing Details
Unconnected
Unconnected
Unconnected Unconnected
ADDRESS INPUT STATE
t
HD:STA
SDA
SCL
______________________________________________________________________________________
High
High
High
Low
Low
Low
A1
2
CONDITION
C devices in addition to the MAX5961) attached
START
2
C addresses (see Table 51).
t
SU:DAT
Unconnected
Unconnected
High
High
High
Low
Low
Low
t
A0
LOW
t
R
2
t
HIGH
C-compatible serial interface
ADDR 7
I
2
t
0
0
0
0
0
0
0
0
0
F
C Serial Interface
t
HD:DAT
ADDR 6
1
1
1
1
1
1
1
1
1
2
C bus can
ADDR 5
t
SU:STA
1
1
1
1
1
1
1
1
1
REPEATED START
CONDITION
ter device to generate a clock signal. The master
device (typically a µC) initiates data transfer on the bus
and generates SCL to permit that transfer.
A master device communicates to the MAX5961 by
transmitting the proper address followed by command
and/or data words. Each transmit sequence is framed
by a START (S) or REPEATED START (SR) condition
and a STOP (P) condition. Each word transmitted over
the bus is 8 bits long and is always followed by an
acknowledge pulse.
SCL is a logic input, while SDA is a logic-input/open-
drain output. SCL and SDA both require external pullup
resistors to generate the logic-high voltage. Use 4.7kΩ
for most applications.
ADDR 4
I
2
C ADDRESS BITS
1
1
1
0
0
0
0
0
0
t
HD:STA
ADDR 3
0
0
0
1
1
1
0
0
0
ADDR 2
t
SU:STO
1
0
0
1
0
0
1
0
0
CONDITION
STOP
ADDR 1
0
1
0
0
1
0
0
1
0
t
BUF
CONDITION
START
ADDR 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W