max5873egktd Maxim Integrated Products, Inc., max5873egktd Datasheet - Page 11

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max5873egktd

Manufacturer Part Number
max5873egktd
Description
Max5873 12-bit, 200msps, High-dynamic-performance, Dual Dac With Cmos Inputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
The TORB input selects between two’s-complement or
binary digital input data. Set TORB to a CMOS-logic-
high level to indicate a two’s-complement input format.
Set TORB to a CMOS-logic-low level to indicate a bina-
ry input format.
The DORI input selects between a dual-port (parallel) or
single-port (interleaved) DAC. Set DORI high to configure
the MAX5873 as a dual-port DAC. Set DORI low to con-
figure the MAX5873 as a single-port DAC. In dual-port
mode, connect SELIQ to ground.
The MAX5873 latches input data on the rising edge of
the clock in a user-selectable two’s-complement or bina-
ry format. A logic-high voltage on TORB selects two’s-
complement and a logic-low selects offset binary format.
The MAX5873 includes a single-ended, CMOS-compati-
ble XOR input. Input data (all bits) are compared with the
Figure 2. Reference Architecture, Internal Reference
Configuration
Table 2. DAC Output Code Table
OFFSET BINARY
0111 1111 1111
0000 0000 0000
1111 1111 1111
I
CMOS DAC Inputs (A11/B11–A0/B0, XOR, SELIQ)
REF
1µF
I
= V
REF
12-Bit, 200Msps, High-Dynamic-Performance,
DIGITAL INPUT CODE
REFIO
R
SET
/ R
SET
Input Data Format Select (TORB, DORI )
CMOS-Compatible Digital Inputs
REFIO
FSADJ
DACREF
10kΩ
REFERENCE
______________________________________________________________________________________
1.2V
1000 0000 0000
0000 0000 0000
0111 1111 1111
COMPLEMENT
TWO’S
CURRENT-SOURCE
ARRAY DAC
I
OUTFS
OUT_P
I
OUTFS
0
/ 2 I
OUTIN
OUTFS
OUTIP
OUT_N
I
OUTFS
Dual DAC with CMOS Inputs
0
/ 2
bit applied to XOR through exclusive-OR gates. Pulling
XOR high inverts the input data. Pulling XOR low leaves
the input data noninverted. By applying a previously
encoded pseudo-random bit stream to the data input and
applying decoding to XOR, the digital input data can be
decorrelated from the DAC output, allowing for the trou-
bleshooting of possible spurious or harmonic distortion
degradation due to digital feedthrough on the printed
circuit board (PCB).
A11/B11–A0/B0, XOR, and SELIQ are latched on the ris-
ing edge of the clock. In single-port mode (DORI pulled
low) a logic-high signal on SELIQ directs the B11–B0
data onto the I-DAC inputs. A logic-low signal at SELIQ
directs data to the Q-DAC inputs. In dual-port (parallel)
mode (DORI pulled high), data on pins A11–A0 are
directed onto the Q-DAC inputs and B11–B0 are directed
onto the I-DAC inputs.
The MAX5873 also features an active-high power-down
mode that reduces the DAC’s digital current consumption
from 21.5mA to less than 2µA and the analog current
consumption from 76mA to less than 2µA. Set PD high
to power down the MAX5873. Set PD low for normal
operation.
When powered down, the MAX5873 reduces the overall
power consumption to less than 14µW. The MAX5873
requires 10ms to wake up from power-down and enter
a fully operational state. The PD integrated pulldown
resistor activates the MAX5873 if PD is left floating.
Figure 3. Simplified Analog Output Structure
SWITCHES
CURRENT
AV
DD
CURRENT
SOURCES
Power-Down Operation (PD)
I
OUT
OUTIN OUTIP
I
OUT
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