max5873egktd Maxim Integrated Products, Inc., max5873egktd Datasheet - Page 15

• Manufacturer Part Number: max5873egktd
• Description: Max5873 12-bit, 200msps, High-dynamic-performance, Dual Dac With Cmos Inputs
• Manufacturer: Maxim Integrated Products, Inc.

A gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step.
For a waveform perfectly reconstructed from digital sam-
ples, the theoretical maximum SNR is the ratio of the full-
scale analog output (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum can
be derived from the DAC’s resolution (N bits):
However, noise sources such as thermal noise, reference
noise, clock jitter, etc., affect the ideal reading; therefore,
SNR is computed by taking the ratio of the RMS signal to
the RMS noise, which includes all spectral components
minus the fundamental, the first four harmonics, and the
DC offset.
The DAC output noise floor is the sum of the quantiza-
tion noise and the output amplifier noise (thermal and
shot noise). Noise spectral density is the noise power in
1Hz bandwidth, specified in dBFS/Hz.
SFDR is the ratio of RMS amplitude of the carrier frequen-
cy (maximum signal components) to the RMS value of
their next-largest distortion component. SFDR is usually
measured in dBc and with respect to the carrier frequen-
cy amplitude or in dBFS with respect to the DAC’s full-
scale range. Depending on its test condition, SFDR is
observed within a predefined window or to Nyquist.
Dynamic Performance Parameter Definitions
12-Bit, 200Msps, High-Dynamic-Performance,
Spurious-Free Dynamic Range (SFDR)
SNR = 6.02 x N + 1.76
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Signal-to-Noise Ratio (SNR)
Noise Spectral Density
Gain Error
Dual DAC with CMOS Inputs
The two-tone IMD is the ratio expressed in dBc (or dBFS)
of the worst 3rd-order (or higher) IMD product(s) to either
output tone.
Commonly used in combination with wideband code-
division multiple-access (W-CDMA), ACLR reflects the
leakage power ratio in dB between the measured
power within a channel relative to its adjacent channel.
ACLR provides a quantifiable method of determining
out-of-band spectral energy and its influence on an
adjacent channel when a bandwidth-limited RF signal
passes through a nonlinear device.
The settling time is the amount of time required from the
start of a transition until the DAC output settles its new
output value to within the converter’s specified accuracy.
A glitch is generated when a DAC switches between
two codes. The largest glitch is usually generated
around the midscale transition, when the input pattern
transitions from 011...111 to 100...000. The glitch
impulse is found by integrating the voltage of the glitch
at the midscale transition over time. The glitch impulse
is usually specified in pV
Adjacent Channel Leakage Power Ratio (ACLR)
Two-Tone Intermodulation Distortion (IMD)
•
s.
Glitch Impulse
Settling Time
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