lm9822ccwmx National Semiconductor Corporation, lm9822ccwmx Datasheet - Page 6
![no-image](/images/no-image-200.jpg)
lm9822ccwmx
Manufacturer Part Number
lm9822ccwmx
Description
Lm9822 3 Channel 42-bit Color Scanner Analog Front End
Manufacturer
National Semiconductor Corporation
Datasheet
1.LM9822CCWMX.pdf
(22 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LM9822CCWMX
Manufacturer:
LATTIC
Quantity:
673
Note 9: Typicals are at T
Note 10: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 11: Full channel integral non-linearity error is defined as the deviation of the analog value, expressed in LSBs, from the straight line that best fits the actual transfer
function of the AFE.
Note 12: The sensor’s maximum peak differential signal range is defined as the peak sensor output voltage for a white (full scale) image, with respect to the dark reference
level.
Note 13: PGA Gain Error is the maximum difference between the measured gain for any PGA code and the ideal gain calculated using:
Note 14: Full Channel INL and DNL are tested with CDS disabled, negative signal polarity, DOE = 0, and a single OS input with a gain register setting of 1 (000001b) and
an offset register setting of 0 (000000b).
Note 15: The digital supply current (ID) does not include the load, data and switching frequency dependent current required to drive the digital output bus on pins (D7 - D0).
The current required to switch the digital data bus can be calculated from: Isw = 2*Nd*Psw*CL*V
each data bit switching, CL is the capacitive loading on each data pin, V
is 8, Psw is
example, if the capacitive load on each digital output pin (D7 - D0) is 20pF and the period of t
The calculated digital switching current will be drawn through the V
Note 16: All specifications quoted in LSBs are based on 12 bit resolution.
Gain
Electrical Characteristics
PGA
V
--- -
V
0.5, and V
=
G
0
+
X PGA code
D
---------------------------- -
J
=T
is 5V, and the switching current can be calculated from: Isw = 40*CL/tMCLK. (With
32
A
=25°C, f
V
RFT
where
MCLK
V
REF
CCD Output Signal
= 12MHz, and represent most likely parametric norm.
X
=
G
31
V
WHITE
–
(Continued)
G
0
32
----- -
31
.
D
pin and should be considered as part of the total power budget for the LM9822.
D
is the digital supply voltage and t
Black Level
6
MCLK
D
/t
is 1/12MHz or 83ns, then the digital switching current would be 9.6mA.
MCLK
where Nd is total number of data pins, Psw is the probability of
MCLK
CIS Output Signal
D
is the period of the MCLK input. For most applications, Nd
at 3.3V, the equation becomes: Isw = 26.4*CL/t
V
WHIT
www.national.com
MCLK
.) For