cs5317 Cirrus Logic, Inc., cs5317 Datasheet - Page 13

• Manufacturer Part Number: cs5317
• Description: 16-bit, 20 Khz Oversampling A/d Converter
• Manufacturer: Cirrus Logic, Inc.

characteristic form in which the damping factor,
Both the natur al frequency and the damping fac-
tor are particularly important in determining the
transient response of the phase-locked loop when
subjected to a step input of phase or frequency. A
family of curves are illustrated in Figure 6 that
indicate the overshoot and stability of the loop as
a function of the damping factor. Each response is
plotted as a function of the normalized time,
For a given
can be determined. Alternatively, phase lock con-
trol loop bandwidth may be a specified parameter.
In some systems it may be desirable to reduce the
-3dB bandwidth of the PLL control loop to re-
duce the effects of jitter in the phase of the input
clock. The 3 dB bandwidth of the PLL control
loop is defined by the following equation:
The equations used to describe the PLL and the
3 dB bandwidth are valid only if the frequency of
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
DS27F4
1.3
2 normalized to 1
, and the natural frequency,
0
3dB
1
Figure 6a.
2
2
1
and lock time, t, the
n
= 10.0
3
2
s
2
2
= 0.5
2
2
4
Unit Step Response
2
1
n
s
5
n
n
t.
s
2
6
n
n
, are evident:
2
2
n
7
2
1
2
n
8
required
1
9
n
10
t.
= 0.5
= 0.6
= 0.7
= 0.8
= 0.9
= 1.0
= 1.5
= 2.0
= 3.0
= 10.0
CLKIN is approximately 20 times greater than
the 3 dB corner frequency of the control loop.
Filter Components
Using the equations which describe the transfer
function of the PLL system, the following exter-
nal filter component equations can be determined:
The gain factors (Ko, Kd) are specified in the
Analog Characteristics table. In the event the sys-
tem calls for very low bandwidth, hence a
corresponding reduction in loop gain, the phase
detector gain factor Kd can be reduced. A large
series resistor (R1) can be inserted between the
output of the detector and the filter. Then the
50 A current sources will saturate to the supplies
and yield the following gain factor:
20 log( 2 / 1 )
Figure 6b. Second Order PLL Frequency Response
-10
-1
-2
-3
-4
-5
-6
-7
-8
-9
4
3
2
1
0
0.1
C
R
Kd
2
N
KoKd
n
2 R
n
2
5V
KoKd
1
1
n
N
= 0.5
CS5317
= 10
13
10