adc0854 National Semiconductor Corporation, adc0854 Datasheet - Page 9

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adc0854

Manufacturer Part Number
adc0854
Description
Multiplexed Comparator With 8-bit Reference Divider
Manufacturer
National Semiconductor Corporation
Datasheet
Functional Description
1 1 The Sampled-data Comparator
The ADC0852 and ADC0854 utilize a sampled-data com-
parator structure to compare the analog difference between
a selected ‘‘
threshold
This comparator consists of a CMOS inverter with a capaci-
tively coupled input ( Figure 4 ) Analog switches connect the
two comparator inputs to the input capacitor and also con-
nect the inverter’s input and output This device in effect
now has one differential input pair A comparison requires
two cycles one for zeroing the comparator and another for
making the comparison
a
’’ and ‘‘
b
’’ input to an 8-bit programmable
FIGURE 4c Multiple Differential Inputs
FIGURE 4 Sampled-Data Comparator
TL H 5521 – 14
FIGURE 4b Compare Phase
TL H 5521 – 8
TL H 5521 – 9
FIGURE 4a Zeroing Phase
9
In the first cycle ( Figure 4a ) one input switch and the invert-
er’s feedback switch are closed In this interval the input
capacitor (C) is charged to the connected input (V1) less the
inverter’s bias voltage (V
cycle ( Figure 4b ) these two switches are opened and the
other (V2) input’s switch is closed The input capacitor now
subtracts its stored voltage from the second input and the
difference is amplified by the inverter’s open loop gain The
inverter input (V
the output will go high or low depending on the sign of V
V
B
Comparator Reads V
V
V on C
C
V
V
0
B
S
0
e
e
e
e
V
Stray Input Node Cap
Inverter Input Bias Voltage
C
B
e
1
e
a
V
C
1
b
C
1
B
– V
2
a
’) becomes V
A
TH
V
V
V
a
B
b
B
0
0
C
from Internal DAC Differentially
2
C
is dependent on V
A
e
b
S
a
V
B
C
B
C
C
a
b
approx 1 2 volts) In the second
1
S
e
A
(V
C
D Q C
(V
B
S
2
b
b
2
CV
b
V
(V1
2
V
1
1
b
1
a
)
)
CV
a
2
b
C
D Q C
b
a
1
C
C
V
V2)
2
C
1
(V
S
2
C
4
b
a
C
V
C
3
S
)
and
B
’-

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