adc1207s080hw NXP Semiconductors, adc1207s080hw Datasheet - Page 12

• Manufacturer Part Number: adc1207s080hw
• Description: Single 12 Bits Adc, Up To 80 Mhz With Direct/ultra High If Sampling
• Manufacturer: NXP Semiconductors

NXP Semiconductors
ADC1207S080_2
Product data sheet
The ADC1207S080 generates an adjustable clock output called Complete Conversion
Signal (CCS), which can be used to control the acquisition of converted output data by the
digital circuit connected to the ADC1207S080 output data bus. Two logic inputs, DEL0 and
DEL1 pins, allow adjusting the delay of the edge of the CCS signal to achieve an optimal
position in the stable, usable zone of the data.
Table 8.
DEL1
0
0
1
1
Fig 6. Complete conversion signal timing diagram
(1) t
DEL0
0
1
0
1
d(CSS)
Complete conversion signal selection
D0 to D11
is referenced to the middle of the active data.
CCS output
high-impedance
active, typical delay 0.3 ns
active, typical delay 1.3 ns
active, typical delay 2.3 ns
CCS
Single 12 bits ADC, up to 80 MHz with direct/ultra high IF sampling
Rev. 02 — 7 August 2008
t
d(CCS)
(1)
ADC1207S080
014aaa433
© NXP B.V. 2008. All rights reserved.
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