adc12d800rfrb National Semiconductor Corporation, adc12d800rfrb Datasheet - Page 25
![no-image](/images/no-image-200.jpg)
adc12d800rfrb
Manufacturer Part Number
adc12d800rfrb
Description
12-bit, 1.6/1.0 Gsps Rf Sampling Adc
Manufacturer
National Semiconductor Corporation
Datasheet
1.ADC12D800RFRB.pdf
(62 pages)
- Current page: 25 of 62
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t
t
t
t
t
t
t
Data Input-to-Output
t
t
t
t
t
t
f
t
t
PWR
SYNC_DLY
LHT
HLT
SU
H
OSK
AD
AJ
OD
LAT
ORR
WU
SCLK
SSU
SH
TABLE 15. Serial Port Interface
Symbol
Symbol
Pulse Width DCLK_RST±
DCLK Synchronization Delay
Differential Low-to-High Transition
Time
Differential High-to-Low Transition
Time
Data-to-DCLK Setup Time
DCLK-to-Data Hold Time
DCLK-to-Data Output Skew
Aperture Delay
Aperture Jitter
Sampling Clock-to Data Output
Delay (in addition to Latency)
Latency in 1:2 Demux Non-DES
Mode
Latency in 1:4 Demux DES Mode
(Note
Latency in Non-Demux Non-DES
Mode
Latency in Non-Demux DES Mode
(Note
Over Range Recovery Time
Wake-Up Time (PDI/PDQ low to
Rated Accuracy Conversion)
Serial Clock Frequency
Serial Clock Low Time
Serial Clock High Time
Serial Data-to-Serial Clock Rising
Setup Time
Serial Data-to-Serial Clock Rising
Hold Time
10)
10)
(Note
(Note
Parameter
Parameter
10)
10)
(Note
90° Mode
0° Mode
10%-to-90%, C
(Note
10%-to-90%, C
(Note
DDR 90° Mode
DDR 90° Mode
50% of DCLK transition to 50% of
Data transition
DDR 0° Mode, SDR Mode
(Note
Sampling CLK+ Rise to
Acquisition of Data
(Note
50% of Sampling Clock transition
to 50% of Data transition
(Note
DI, DQ Outputs
DId, DQd Outputs
DI Outputs
DQ Outputs
DId Outputs
DQd Outputs
DI Outputs
DQ Outputs
DI Outputs
DQ Outputs
Differential V
0V to accurate conversion
(Note
Non-DES Mode
DES Mode
(Note
(Note
(Note
10)
11)
11)
11)
11)
11)
10)
10)
10)
10)
(Note
(Note
Conditions
Conditions
(Note
IN
25
10)
step from ±1.2V to
L
L
(Note
(Note
10)
(Note
= 2.5 pF
= 2.5 pF
10)
(Note
11)
11)
10)
11)
ADC12D800RF ADC12D500RF
ADC12D800RF ADC12D500RF
TBD
TBD
TBD
TBD
Typ
Typ
220
220
±50
500
0.2
2.5
15
1
1
1
17.5
17.5
18.5
17.5
Lim
Lim
18
18
19
17
17
17
30
30
5
4
5
TBD
TBD
TBD
TBD
Typ
Typ
220
220
±50
500
0.2
2.5
15
1
1
1
17.5
17.5
18.5
17.5
Lim
Lim
18
18
19
17
17
17
30
30
5
4
5
www.national.com
Sampling
Sampling
Sampling
Sampling
(Limits)
ps (rms)
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
Cycles
Cycles
Cycles
Units
Clock
Clock
Clock
Clock
Cycle
Units
(min)
MHz
ps
ps
ps
ps
ps
ns
ns
ns
µs
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