adc1061cin National Semiconductor Corporation, adc1061cin Datasheet - Page 8

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adc1061cin

Manufacturer Part Number
adc1061cin
Description
10-bit High-speed ?p-compatible A/d Converter With Track/hold Function
Manufacturer
National Semiconductor Corporation
Datasheet

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1.0 Modes of Operation
2.0 Reference Considerations
The ADC1061 has two reference inputs. These inputs,
V
full-scale range of the input signal. The reference inputs can
be connected to span the entire supply voltage range (V
be connected to different voltages (as long as they are be-
tween ground and V
Reducing the overall V
the sensitivity of the converter (e.g., if V
become larger when lower reference voltages are used. See
the Typical Performance Curves for more information. Refer-
ence voltages less than 2V are not recommended.
In most applications, V
ground, but it is often useful to have an input span that is off-
set from ground. This situation is easily accommodated by
the reference configuration used in the ADC1061. V
be connected to a voltage other than ground as long as the
reference for this pin is capable of sinking current. If V
connected to a voltage other than ground, bypass it with mul-
tiple capacitors.
Since the resistance between the two reference inputs can
be as low as 400 , the voltage source driving the reference
inputs should have low output impedance. Any noise on ei-
ther reference input is a potential cause of conversion errors,
so each of these pins must be supplied with a clean, low
noise voltage source. Each reference pin should normally be
bypassed with a 10 µF tantalum and a 0.1 µF ceramic ca-
pacitor. More bypassing may be necessary in some sys-
tems.
The choice of reference voltage source will depend on the
requirements of the system. In ratiometric data acquisition
systems with a power supply-referenced sensor, the refer-
ence inputs are normally connected to V
no reference other than the power supply is necessary. In
absolute measurement systems requiring 10-bit accuracy, a
reference with better than 0.1% accuracy will be necessary.
= 0V, V
= 1.953 mV). Note, however, that linearity and offset errors
REF+
and V
REF+
REF−
= V
CC
, are fully differential and define the zero to
FIGURE 4. Typical connection. Note the multiple bypass capacitors on the reference
) for ratiometric applications, or they can
CC
and power supply pins. If V
) when other input spans are required.
ground using multiple capacitors (see 5.0 “Power Supply Considerations”).
REF
REF−
span to less than 5V increases
will simply be connected to
REF
(Continued)
CC
= 2V, then 1LSB
and GND, and
REF
REF−
REF−
− is not grounded, it should also be bypassed to
REF−
can
is
8
3.0 The Analog Input
The ADC1061 samples the analog input voltage once every
conversion cycle. When this happens, the input is briefly
connected to an impedance approximately equal to 600
series with 35 pF. Short-duration current spikes can there-
fore be observed at the analog input during normal opera-
tion. These spikes are normal and do not degrade the con-
vertor’s performance.
Note that large source impedances can slow the charging of
the sampling capacitors and degrade conversion accuracy.
Therefore, only signal sources with output impedances less
than 500
achieved at the minimum sample time. If the sampling time is
increased, the source impedance can be larger. If a signal
source has a high output impedance, its output should be
buffered with an operational amplifier. The operational ampli-
fier’s output should be well-behaved when driving a switched
35 pF/600
amp’s output during the sampling period can result in con-
version errors.
Correct conversion results will be obtained for input voltages
greater than GND − 50 mV and less than V
allow the signal source to drive the analog input pin more
than 300 mV higher than AV
mV lower than GND. If the analog input pin is forced beyond
these voltages, the current flowing through the pin should be
limited to 5 mA or less to avoid permanent damage to the
ADC1061.
4.0 Inherent Sample-and-Hold
Because the ADC1061 samples the input signal once during
each conversion, it is capable of measuring relatively fast in-
put signals without the help of an external sample-hold. In a
conventional successive-approximation A/D converter, re-
gardless of speed, the input signal must be stable
to better than
nificant errors will result. Consequently, even for many rela-
tively slow input signals, the signals must be externally
sampled and held constant during each conversion.
should be used if rated accuracy is to be
load. Any ringing or voltage shifts at the op
±
1
2
LSB during each conversion cycle or sig-
CC
DS010559-14
and DV
CC
, or more than 300
+
+ 50 mV. Do not
in

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