adc1613d NXP Semiconductors, adc1613d Datasheet - Page 28

• Manufacturer Part Number: adc1613d
• Description: Dual 16-bit Adc; 65 Msps, 80 Msps, 105 Msps Or 125 Msps; Serial Jesd204a Interface
• Manufacturer: NXP Semiconductors

Table 17.
[1]
[2]
Addr
Hex
0821
0822
0823
0824
0825
0826
0827
0828
0829
082C
082D
084C
084D
0870
0871
0890
0891
an "*" in the Access column means that this register is subject to control access conditions in Write mode.
an "*" in the Default column replaces a bit of which the value depends on the binary level of external pins (e.g. CFG[3:0], Swing[1:0], Scrambler).
Register name
Cfg_1_BID
Cfg_3_SCR_L
Cfg_4_F
Cfg_5_K
Cfg_6_M
Cfg_7_CS_N
Cfg_8_Np
Cfg_9_S
Cfg_10_HD_CF
Cfg_01_2_LID
Cfg_02_2_LID
Cfg01_13_FCHK R
Cfg02_13_FCHK R
LaneA_0_Ctrl
LaneB_0_Ctrl
ADCA_0_Ctrl
ADCB_0_Ctrl
Register allocation map
R/W
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R
R/W*
R/W*
R/W*
R/W*
R/W
R/W
R/W
R/W
[1]
Bit definition
Bit 7
…continued
SCR
HD
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 6
SCR_IN_
SCR_IN_
MODE
MODE
CS[0]
0
0
0
0
0
0
0
0
0
0
0
0
Bit 5
LANE_MODE[1:0]
LANE_MODE[1:0]
0
0
0
0
0
0
0
0
0
0
0
ADC_MODE[1:0]
ADC_MODE[1:0]
Bit 4
0
0
0
0
0
0
0
FCHK[7:0]
FCHK[7:0]
Bit 3
0
0
0
0
0
0
0
0
0
Bit 2
LID[4:0]
LID[4:0]
NP[4:0]
LANE_
LANE_
K[4:0]
POL
POL
0
0
0
0
0
0
BID[3:0]
N[3:0]
Bit 1
LANE_CLK_
LANE_CLK_
POS_EDGE
POS_EDGE
F[2:0]
0
0
0
0
0
CF[1:0]
Bit 0
LANE_PD
LANE_PD
ADC_PD
ADC_PD
M
S
L
0000
*000 000*
000* ****
0100 0***
0000 1111
0000
*000 0000
0001 1011
0001 1100
**** ****
**** ****
0000 000*
0000 000*
0000 000*
0000 000*
Default
Bin
1010
0000 0***
0000 000*
0000
[2]