ad1812 Analog Devices, Inc., ad1812 Datasheet - Page 17

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ad1812

Manufacturer Part Number
ad1812
Description
Soundport Controller
Manufacturer
Analog Devices, Inc.
Datasheet

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SYSTEM TIMING AND CONTROL
If the AD1812 is not connected directly to the OSC clock on the
ISA bus, a single fundamental-mode and parallel-tuned
14.31818 MHz crystal oscillator can be substituted to derive all
timing parameters. Future feature enhanced, pin-compatible
versions of the SoundPort Controller will require a 33 MHz
clock or crystal input. Analog Devices suggests developing board
layouts that can be easily modified to supply the new clock.
DATA AND CONTROL TRANSFERS
The embedded SoundPort Stereo Codec supports a DMA
request/grant architecture for transferring data with the host
computer bus. One or two 8-bit or 16-bit DMA channels can
be supported. Programmed I/O (PIO) mode is also supported
for control register accesses and for applications lacking DMA
control. PIO transfers can be made on one channel while the
other is performing DMA. Transfers to and from the AD1812
are asynchronous relative to the internal data conversion clock.
Transfers are buffered by FIFOs located in the capture and
playback paths.
REFERENCE DESIGNS AND DEVICE DRIVERS
Reference designs and device drivers using the AD1812 are
available via Bulletin Board Service. The Computer Products
Division runs a BBS that can be reached at speeds up to 14,400
baud, no parity, 8 bits data, 1 stop bit, by dialing (617) 461-
4258. The BBS supports: V.32bis, error correction (V.42 and
MNP classes 2, 3, and 4), and data compression (V.42bis and
MNP class 5). Reference designs can also be found in the
AD1812 SoundPort Controller Technical Reference which can
be obtained by contacting your local Analog Devices sales repre-
sentative or authorized distributor. You can also find us on the
World Wide Web at http://www.analog.com.
FREQUENCY RESPONSE PLOTS
Figure 8. Analog-to-Digital Frequency Response to F
(Full-Scale Line-Level Inputs, –1 dB Gain)
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
10
0
0
0.1
0.2
0.3
SAMPLE FREQUENCY – F
0.4
0.5
0.6
0.7
S
0.8
0.9
1.0
S
–17–
Figure 10. Digital-to-Analog Frequency Response to F
(Full-Scale Inputs, 0 dB Attenuation)
Figure 11. Digital-to-Analog Frequency Response —
Transition Band (Full-Scale Inputs, 0 dB Attenuation)
Figure 9. Analog-to-Digital Frequency Response —
Transition Band (Full-Scale Line-Level Inputs,
–1 dB Gain)
–100
–110
–120
–100
–110
–120
–100
–110
–120
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
–10
–20
–30
–40
–50
–60
–70
–80
–90
10
10
10
0
0.40
0
0.40
0
0
0.1
0.44
0.44
0.2
0.48
0.48
0.3
SAMPLE FREQUENCY – F
SAMPLE FREQUENCY – F
SAMPLE FREQUENCY – F
0.52
0.52
0.4
0.5
0.56
0.56
0.6
0.60
0.60
0.7
S
S
S
0.64
0.64
0.8
AD1812
0.9
0.68 0.70
0.68 0.70
1.0
S

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