tda8763m/3 NXP Semiconductors, tda8763m/3 Datasheet - Page 11

• Manufacturer Part Number: tda8763m/3
• Description: 10-bit High-speed Low-power Adc With Internal Reference Regulator
• Manufacturer: NXP Semiconductors

Philips Semiconductors
3. In order to ensure the optimum linearity performance of such converter architecture the lower and upper extremities
4.
5. The analog bandwidth is defined as the maximum input sine wave frequency which can be applied to the device.
6. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale
7. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8 K acquisition points per equivalent
8. Intermodulation measured relative to either tone with analog input frequencies of 4.43 MHz and 4.53 MHz. The two
9. Measurement carried out using video analyser VM700A, where the video analog signal is reconstructed through a
10. Output data acquisition: the output data is available after the maximum delay time of t
1999 Jan 06
10-bit high-speed low-power ADC with
internal reference regulator
of the converter reference resistor ladder (corresponding to output codes 0 and 1023 respectively) are connected to
pins V
a) The current flowing into the resistor ladder is
b) Since R
No glitches greater than 2 LSBs, neither any significant attenuation are observed in the reconstructed signal.
input (square wave signal) in order to sample the signal and obtain correct output data.
fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency
(NYQUIST frequency). Conversion to signal-to-noise ratio: SINAD = EB
input signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.
digital-to-analog converter.
recommended to have the lowest possible output load.
E
G
to cover code 0 to code 1023, is
codes at a given input voltage depends mainly on the difference V
supply voltage. When several ADCs are connected in parallel and fed with the same reference source, the
matching between each of them is then optimized.
----------------------------------------- -
R
=
OB
RB
----------------------------------------------------------- -
V
+
and V
1023
R
R
L
L
L
, R
+
–
V
RT
OB
R
V
i p p
OT
0
via offset resistors R
and R
–
–
will be kept reasonably constant from device to device. Consequently variation of the output
V
i p p
OT
–
handbook, halfpage
have similar behaviour with respect to process and temperature variation, the ratio
100
V
I
OB
=
V RM
V RT
V RB
Fig.3 Explanation of note 3.
R
and R
L
I
L
I
OT
L
=
R LAD
=
as shown in Fig.3.
----------------------------------------- -
R
----------------------------------------- -
R
OB
11
OB
V
+
RT
+
R L
R
R
R OB
R OT
R
L
L
I L
–
MGD281
+
L
V
+
R
RB
code 1023
code 0
R
OT
OT
RT
and the full-scale input range at the converter,
V
RT
V
6.02 + 1.76 dB.
RB
–
and its variation with temperature and
V
RB
d(max)
=
0. ˙ 848
. For 50 MHz version it is
Product specification
V
TDA8763
RT
–
V
RB