tda8007bhl/c3 NXP Semiconductors, tda8007bhl/c3 Datasheet - Page 26

• Manufacturer Part Number: tda8007bhl/c3
• Description: Double Multiprotocol Ic Card Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
8.2.3.4
The UART Configuration Registers 1 (UCR11, UCR21 and UCR31) set the parameters of the ISO UART.
Table 23 Registers UCR11, UCR21 and UCR31 (address 06H; read and write); note 1
Note
1. Register value at reset: all relevant bits are cleared after reset.
Table 24 Description of UCR1 bits
8.2.3.5
The Clock Configuration Registers (CCR1, CCR2 and CCR3) relate the clock signals:
Table 25 Registers CCR1, CCR2 and CCR3 (address 01H; read and write); note 1
Note
1. Register value at reset: all relevant bits are cleared after reset.
2003 Feb 18
BIT
For cards 1 and 2, register CCRx defines the clock for the selected card
For cards 1, 2 and 3, register CCRx defines the clock to the ISO UART. It should be noted that, if bit CKU in the
prescaler register of the selected card (register UCR2) is set, then the ISO UART is clocked at twice the frequency of
the card, which allows baud rates not foreseen in ISO 7816 norm to be reached.
Double multiprotocol IC card interface
7
6
5
4
3
2
1
0
UC17
CC7
7
7
SYMBOL
CONV
PROT
UC17
LCT
T/R
UART configuration register 1
FIP
Clock configuration registers
FC
SS
not used
Force Inverse Parity. If bit FIP is set to logic 1, the UART will NAK a correctly received character,
and will transmit characters with wrong parity bits.
Test. Bit FC is a test bit, and must be left at logic 0.
Protocol. Bit PROT is set if the protocol is T = 1 (asynchronous) and bit PROT = 0 if the protocol is
T = 0.
Transmit/Receive. Bit T/R is set by software for transmission mode. A change from logic 0 to 1 will
set bit TBE in register USR. Bit T/R is automatically reset by hardware if bit LCT has been used
before transmitting the last character.
Last Character to Transmit. Bit LCT is set by software before writing the last character to be
transmitted in the UTR. It allows automatic change to reception mode. It is reset by hardware at the
end of a successful transmission. When LCT is being reset, the bit T/R is also reset and the
ISO 7816 UART is ready for receiving a character.
Software convention setting. Bit SS is set by software before ATR for automatic convention
detection and early answer detection. It is automatically reset by hardware at 10.5 ETU after
reception of the initial character.
Convention. Bit CONV is set if the convention is direct. Bit CONV is either automatically written by
hardware according to the convention detected during ATR, or by software if the bit AUTOCONV in
register UCR2X is set.
CC6
FIP
6
6
SHL
FC
5
5
PROT
CST
4
4
26
DESCRIPTION
T/R
SC
3
3
LCT
AC2
2
2
AC1
SS
1
1
Product specification
TDA8007B
CONV
AC0
0
0