tda8000t NXP Semiconductors, tda8000t Datasheet - Page 6

• Manufacturer Part Number: tda8000t
• Description: Smart Card Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Between steps 3 and 5, a HIGH level on pin RSTIN allows
the CLK signal to be applied to the card. This feature
facilitates a precise count of CLK periods while waiting for
the card to respond to a reset.
After step 5, RSTIN has no further action on CLK.
After step 6, RST is set to the complementary value of
RSTIN.
R
When the activation sequence is completed and, after the
card has replied to its Answer-to-Reset, theTDA8000
enters the READ mode. Data is exchanged between the
card and the microcontroller via the I/O lines.
When it is required to write to the internal memory of the
card, the circuit is set to the WRITE mode by the
microcontroller.
Cards with EPROM memory require a programming
voltage (V
V
The circuit supports cards with V
The selection of P is achieved by PSEL1 and PSEL2
according to Table 1.
Table 1 Card programming voltage selection
In order to respect the ISO7816 slopes, the circuit
generates V
capacitor. The voltage on this capacitor is then amplified
by a power stage gain of 5, powered via an external supply
pin V
W
When the microcontroller sets the WRITE line (active
LOW), the circuit enters the WRITE mode. V
5 V to the selected value with a typical slew rate of 1 V/ s.
When the write operation is completed, the microcontroller
returns the WRITE line to its HIGH state, and V
back to 5 V with the same slew rate.
WRITE has no action outside a session.
1996 Dec 12
EAD MODE
PP
RITE MODE
Smart card interface
PSEL1
HIGH
HIGH
GENERATION
LOW
LOW
H
[30 V (max.)].
PP
PP
).
(see Fig.7)
by charging and discharging an internal
PSEL2
HIGH
HIGH
LOW
LOW
PP
PROGRAMMING
of 12.5, 15 or 21 V.
VOLTAGE P
12.5
15
21
5
PP
rises from
PP
falls
6
D
When the session is completed, the microcontroller sets
the START line to its HIGH state.
The circuit then executes an automatic deactivation
sequence by counting back the sequencer:
1. Card reset (RST falls to LOW)
2. CLK is stopped
3. No change
4. V
5. I/O1( C) and I/O2( C) become high impedance
6. V
The circuit returns to the IDLE mode on the next rising
edge of the sequencer clock.
P
Main fault conditions are monitored by the circuit:
When one of these fault conditions is detected, the circuit
pulls the interrupt line OFF to its active LOW state and
returns to the FAULT mode.
F
When a fault condition is written to the microcontroller via
the OFF line, the circuit initiates a deactivation sequence.
After the deactivation sequence has been completed, the
OFF line is reset to its HIGH state when the microcontroller
has reset the START line HIGH, except if the fault
condition was due to a card extraction.
Note
The two other causes of emergency deactivation (Power
failure detected on V
AULT MODE
ROTECTIONS
EACTIVATION SEQUENCE
Short-circuit on V
Short-circuit on V
Over current on I/Os
Card extraction during transaction
Overheating problem.
PP
CC
falls to 0 V
falls to 0 V.
(see Fig.9)
CC
PP
DD
TDA8000; TDA8000T
or V
(see Fig.8)
SUP
) do not act upon OFF.
Product specification