clc5633 National Semiconductor Corporation, clc5633 Datasheet - Page 15

• Manufacturer Part Number: clc5633
• Description: Triple, High Output, Programmable Gain Buffer
• Manufacturer: National Semiconductor Corporation

Application Division
Layout Considerations
A proper printed circuit layout is essential for achieving high
frequency performance. National provides evaluation boards
for the CLC5633 (CLC730075-DIP, CLC730074-SOIC) and
suggests their use as a guide for high frequency layout and
as an aid for device testing and characterization.
General layout and supply bypassing play major roles in high
frequency performance. Follow the steps below as a basis
for high frequency layout:
Evaluation Board Information
A data sheet is available for the CLC730075/CLC730074
evaluation boards. The evaluation board data sheets pro-
vide:
The evaluation boards are designed to accommodate dual
supplies. The boards can be modified to provide single
supply operation. For best performance; 1) do not connect
the unused supply, 2) ground the unused supply pin.
Special Evaluation Board
Considerations for the CLC5633
To optimize off-isolation of the CLC5633, cut the R
both the CLC730074 and the CLC730075 evaluation
boards. This cut minimizes capacitive feedthrough between
the input and the output.
SPICE Models
SPICE models provide a means to evaluate amplifier de-
signs. Free SPICE models are available for National’s mono-
lithic amplifiers that:
• Include 6.8µF tantalum and 0.1µF ceramic capacitors on
• Place the 6.8µF capacitors within 0.75 inches of the
• Place the 0.1µF capacitors less than 0.1 inches from the
• Remove the ground plane under and around the part,
• Use flush-mount printed circuit board pins for prototyping,
• Evaluation board schematics
• Evaluation board layouts
• General information about the boards
• Support Berkeley SPICE 2G and its many derivatives
both supplies.
power pins.
power pins.
especially near the input and output pins to reduce para-
sitic capacitance.
never use high profile DIP sockets.
(Continued)
f
trace on
15
The readme file that accompanies the diskette lists released
models, and provides a list of modeled parameters. The
application note OA-18, Simulation SPICE Models for Na-
tional’s Op Amps, contains schematics and a reproduction of
the readme file.
Application Circuits
Single Supply Cable Driver
Figure 13 below shows the CLC5633 driving 10m of 75
coaxial cable. The CLC5633 is set for a gain of +2V/V to
compensate for the divide-by-two voltage drop at V
response after 10m of cable is illustrated in Figure 14 .
V
• Reproduce typical DC, AC, Transient, and Noise perfor-
• Support room temperature simulations
in
0.1 F
mance
+5V
FIGURE 14. Response After 10m of Cable
FIGURE 13. Single Supply Cable Driver
5k
5k
V
in
= 10MHz, 0.5V
0.1 F
6.8 F
0.1 F
+
+5V
1
2
3
4
5
6
7
pp
CLC5633
1k
1k
20ns/div
+ -
+ -
-
1k
+
1k
1k
1k
14
13
12
11
10
9
8
0.1 F
Note: Channel 2 and 3 not shown.
75
DS015005-53
Coaxial Cable
www.national.com
10m of 75
O
. The
DS015005-52
75
V
o