hi1177 Intersil Corporation, hi1177 Datasheet - Page 8

• Manufacturer Part Number: hi1177
• Description: 8-bit, 40msps, 2-channel D/a Converter
• Manufacturer: Intersil Corporation

Application Circuit
Operation
• How to select the output resistance:
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out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
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from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
- The HI1177 is a D/A converter of the current output type.
- Calculate the output resistance value from the relation
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
To obtain the output voltage connect the resistance to IO
pin (Y0, C0). For specifications we have:
of V
resistance is connected to reference current pin I
some cases, however, this turns out to be a value that
does not actually exist. In such a case a value close to it
can be used as a substitute. Here please note that V
becomes V
connected to IO while R’ is connected to I
ing the resistance value can curb power consumption.
On the other hand glitch energy and data settling time
will inversely increase. Set the most suitable value
according to the desired application.
Output full scale voltage
Output full scale current
FS
= I
FS
FS
X R. Also, 16 times resistance of the output
= V
Y IN
REF
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12
X 16R/R’. R is the resistance
(MSB)
(LSB)
V
I
(LSB)
FS
FS
1
2
3
4
5
6
7
8
= less than 15mA
DV
= less than 2V
32
9
DD
31
10
REF
AV
0.1 F
DD
30
11
. Increas-
REF
29
12
200
C IN
AV
. In
FS
SS
28
13
FIGURE 11.
HI1177
Y OUT
14
27
15
26
• Phase relation between data and clock:
• V
200
AV
- To obtain the expected performance as a D/A converter, it
- To reduce noise effects separate analog and digital
SS
DD
16
25
is necessary to set properly the phase relation between
data and clock applied from the exterior. Be sure to
satisfy the provisions of the set up time (t
(t
systems in the device periphery. For V
digital and analog, bypass respective GNDs by using a
ceramic capacitor of about 0.1 F, as close as possible
to the pin.
H
AV
(MSB)
, V
24
23
22
21
20
19
18
17
) as stipulated in the Electrical Characteristics.
SS
SS
C OUT
:
1K
AV
AV
DD
SS
3.3K
AV
0.1 F
DV
DV
SS
SS
SS
CLOCK
S
) and hold time
DD
pins, both