uda1338h-n1 NXP Semiconductors, uda1338h-n1 Datasheet - Page 16

• Manufacturer Part Number: uda1338h-n1
• Description: Multichannel Audio Coder-decoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 14389
Product data sheet
9.2 Device addressing
9.3 Register addressing
The data transfer mode is characterized by signal L3MODE = HIGH and is used to
transfer one or more bytes representing a register address, instruction or data.
Basically, two types of data transfers can be defined:
The device address consists of one byte with:
Table 13:
After sending the device address (including DOM bits), indicating whether the information
is to be read or written, one data byte is sent using bit 0 to indicate whether the
information will be read or written and bit 1 to bit 7 for the destination register address.
Basically, there are 3 methods for register addressing:
DOM
Bit 0
0
1
0
1
1. Addressing for write data: bit 0 is logic 0 indicating a write action to the destination
2. Addressing for prepare read: bit is logic 1, indicating that data will be read from the
3. Addressing for data read action. Here, the device returns a register address prior to
•
•
•
•
Write action: data transfer to the device
Read action: data transfer from the device.
Data Operating Mode (DOM) bits 0 and 1 representing the type of data transfer;
see
Address bit 2 to bit 7 representing a 6-bit device address. The address of the
UDA1338H is 01 0100 (bit 2 to bit 7).
register, followed by bit 1 to bit 7 indicating the register address; see
register; see
sending data from that register. When bit 0 is logic 0, the register address is valid;
when bit 0 is logic 1, the register address is invalid; see
Table
Selection of data transfer
11.
Figure
Rev. 03 — 16 February 2005
12.
Bit 1
0
0
1
1
Multichannel audio coder-decoder
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Figure
Transfer
not used
not used
write data or prepare read
read data
UDA1338H
12.
Figure
11.
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