uda1325 NXP Semiconductors, uda1325 Datasheet - Page 14

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uda1325

Manufacturer Part Number
uda1325
Description
Universal Serial Bus Usb Codec
Manufacturer
NXP Semiconductors
Datasheet

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Table 6 Selection of data transfer type
Data bits 7 to 2 represent a 6-bit device address, with bit 7 being the MSB and bit 2 the LSB. The address of the ADAC
is 000101 (bits 7 to 2). In the event that the ADAC receives a different address, it will deselect its microcontroller interface
logic.
D
The selection preformed in the address mode remains active during subsequent data transfers, until the ADAC receives
a new address command. The data transfer mode is characterized by L3_MODE being HIGH and a burst of 8 pulses on
L3_CLK, accompanied by 8 data bits. All transfers are bitwise, i.e. they are based on groups of 8 bits. Data will be stored
in the ADAC after the eight bit of a byte has been received. The principle of a multibyte transfer is illustrated in the figure
below.
P
The sound processing and other feature values are stored in independent registers. The first selection of the registers is
achieved by the choice of data transfer type. This is performed in the address mode, bits 1 and 0 (see Table 6).
The second selection is performed by bit 7 and/or bit 6 of the data byte depending of the selected data transfer type.
Data transfer type ‘audio feature registers’
When the data transfer type ‘audio feature registers’ is selected 4 audio feature registers can be selected depending on
bits 7 and 6 of the data byte (see Table 7).
1999 May 10
ROGRAMMING THE SOUND PROCESSING AND OTHER FEATURES
ATA TRANSFER MODE
Universal Serial Bus (USB) CODEC
BIT1
0
0
1
1
L3CLOCK
L3MODE
L3DATA
BIT0
0
1
0
1
address
audio feature registers (volume left, volume right, bass and treble)
not used
control registers
not used
data byte #1
14
t halt
data byte #2
DATA TRANSFER TYPE
address
MGD018
Preliminary specification
UDA1325

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