uda1345ts-n2 NXP Semiconductors, uda1345ts-n2 Datasheet
uda1345ts-n2
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uda1345ts-n2 Summary of contents
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... DATA SHEET UDA1345TS Economy audio CODEC Product specification Supersedes data of 2000 Dec 19 INTEGRATED CIRCUITS 2002 May 28 ...
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... AC CHARACTERISTICS (ANALOG CHARACTERISTICS (DIGITAL) 13 APPLICATION INFORMATION 14 PACKAGE OUTLINE 15 SOLDERING 15.1 Introduction to soldering surface mount packages 15.2 Reflow soldering 15.3 Wave soldering 15.4 Manual soldering 15.5 Suitability of surface mount IC packages for wave and reflow soldering methods 16 DATA SHEET STATUS 17 DEFINITIONS 18 DISCLAIMERS 2 Product specification UDA1345TS ...
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... The UDA1345TS also supports three combined data formats with MSB justified data output and LSB 16, 18 and 20 bits data input. The UDA1345TS can be used either with static pin control or under L3 microcontroller interface mode the UDA1345TS has basic sound features in playback mode such as de-emphasis, volume control and soft mute ...
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... A-weighted f = 44.1 kHz kHz s code = 0; A-weighted f = 44.1 kHz kHz Product specification UDA1345TS TYP. MAX. UNIT 3.0 3.6 V 3.0 3.6 V 3.0 3 600 800 A 300 800 150 A 2.0 3.0 mA ...
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... The input voltage to the ADC scales proportionally with the power supply voltage. 3. The output voltage of the DAC scales proportionally with the power supply voltage. 2002 May 28 CONDITIONS MIN. 5 Product specification UDA1345TS TYP. MAX. UNIT ...
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... SWITCH ADC ADC DECIMATION FILTER DC-CANCELLATION FILTER DIGITAL INTERFACE INTERPOLATION FILTER NOISE SHAPER DAC DAC SSO V DDA(DAC) V SSA(DAC) Fig.1 Block diagram. 6 Product specification UDA1345TS V ADCN V ref( dB/6 dB VINR SWITCH 8 MC1 21 MC2 20 MP5 13 MP2 14 L3-BUS MP3 INTERFACE ...
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... SSO V 28 analog pad ref(D) 2002 May 28 TYPE 7 Product specification UDA1345TS DESCRIPTION ADC analog ground ADC analog supply voltage ADC input left ADC reference voltage ADC input right ADC negative reference voltage ADC positive reference voltage mode control 1 (pull-down) ...
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... Note: the sampling frequency range is from 8 to 100 kHz, however for the 512f clock mode the sampling range is s from kHz. 2002 May 28 7.1 The stereo ADC of the UDA1345TS consists of two V ref(D) 28 5th-order Sigma-Delta modulators. They have a modified Ritchie-coder architecture in a differential switched V SSO 27 capacitor implementation ...
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... Test modes Static pin mode . It shifts s Important: in L3MODE the UDA1345TS is completely pin and function compatible with the UDA1340M and the UDA1344TS. Note: the UDA1345TS does NOT support bass-boost and treble. 9 Product specification UDA1345TS The Filter Stream DAC (FSDAC) Power control 4 = 128 samples ...
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... Droop Attenuation Dynamic range OUTPUT INTERFACE 7.11 The UDA1345TS is set to static pin control mode by setting both MC1 (pin 8) and MC2 (pin 21) HIGH. 7.11.1 The pinning definition under static pin control is given in Table 7. Table 7 Pinning definition for static pin control SYMBOL PIN MP1 ...
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... May 28 7.11.5 and 384f . The UDA1345TS supports (RMS) input using series resistor as described in Section 7.2. In static pin mode the 3-level pin MP4 (pin 15) is used to select gain mode. When MP4 is set LOW the ADC is powered-down ...
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Acrobat reader. white to force landscape pages to be ... WS LEFT BCK DATA MSB B2 WS LEFT ...
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... Data bits represent a 6-bit device address, with bit 7 being the MSB and bit 2 the LSB. The address of the UDA1345TS is 000101 (bit 7 to bit 2). In the event that the UDA1345TS receives a different address, it will deselect its microcontroller interface logic. ...
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... L3MODE t s(MT) L3CLOCK L3DATA write 2002 May s(MA) t s(DAT) t h(DAT) BIT 0 Fig.4 Timing address mode h(DAT) BIT 0 Fig.5 Timing for data transfer mode. 14 Product specification UDA1345TS t s(MA) t h(MA BIT 7 MGL883 t halt h(MT) t s(DAT) BIT 7 MGL884 ...
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... VC3 VC2 VC1 VC0 DE0 PC1 PC0 15 Product specification UDA1345TS address MGD018 REGISTER SELECTED System Clock frequency (5 : 4); data Input Format (3 : 1); DC-filter REGISTER SELECTED Volume Control ( not used De-Emphasis (4 : 3); MuTe Power Control ( ...
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... FUNCTION 7.12.2.6 A 2-bit value to enable the digital de-emphasis filter. Table 19 De-emphasis settings DE1 7.12.2.7 A 1-bit value to enable the digital DAC mute (playback). Table 20 DAC mute FUNCTION Product specification UDA1345TS VOLUME (dB ...
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... JEDEC II specification T = 125 C; amb amb DD note 2 output short-circuited to V SSA(DAC) output short-circuited to V DDA(DAC) CONDITIONS in free air 17 Product specification UDA1345TS FUNCTION ADC off off on on MIN. MAX. 5.0 150 65 +125 40 +85 200 = 3 V; 450 325 VALUE 90 DAC ...
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... DAC power-down operating mode DAC power-down operating mode ADC and DAC power-down 2.0 0.5 1.3 0.9 0.4 0.9V 0.4V 0 0.85V with respect to V 0.45V SSA kHz i 18 Product specification UDA1345TS MIN. TYP. MAX. 3.0 3.6 V 3.0 3.6 V 3.0 3 600 800 300 800 4 7 150 2.0 3.0 mA 200 ...
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... May 28 CONDITIONS with respect to V SSA (THD + N)/S < 0.1 800 L note 2 ) must be connected to the same external power supply unit. SS resistor must be connected in series with the DAC output 19 Product specification UDA1345TS MIN. TYP. MAX. 0.45V 0.5V 0.55V DDA DDA DDA 12.5 0.13 3.0 1.7 3 ...
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... A-weighted f = 44.1 kHz kHz s code = 0; A-weighted f = 44.1 kHz kHz kHz; ripple ripple(p-p) 20 Product specification UDA1345TS MIN. TYP. MAX. UNIT 2.5 1.5 0.5 dBFS 0 100 ...
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... MHz sys f 19.2 MHz sys f < 19.2 MHz sys f 19.2 MHz sys address mode address mode data transfer mode data transfer mode 21 Product specification UDA1345TS MIN. TYP. MAX. UNIT 39 88 488 325 244 ns 0.30T 0.70T ns sys sys ...
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... CWL T sys Fig.7 System clock timing. t s(WS) t h(WS BCKL t d(DATAO-WS) Fig.8 Serial interface timing. 22 Product specification UDA1345TS MIN. TYP. MAX. 190 30 190 MGR984 t d(DATAO-BCK) t h(DATAO) t s(DATAI) t h(DATAI) MGL885 UNIT ...
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... MP2 13 MP3 14 MP4 SSO V DDO C26 100 nF ( 100 F R25 ( DDO Fig.9 Application diagram. 23 Product specification UDA1345TS V DDD R28 10 V ADCP V SSD V DDD ref(A) 4 C22 100 nF ( VOUTL R22 ( ...
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... 2.5 scale (1) ( 0.38 0.20 10.4 5.4 7.9 0.65 0.25 0.09 10.0 5.2 7.6 REFERENCES JEDEC EIAJ MO-150 detail 1.03 0.9 1.25 0.2 0.13 0.63 0.7 EUROPEAN PROJECTION Product specification UDA1345TS SOT341 ( 1.1 8 0.1 o 0.7 0 ISSUE DATE 95-02-04 99-12-27 ...
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... Use a low voltage ( less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds 300 C. When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 25 Product specification UDA1345TS ...
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... Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. 2002 May 28 SOLDERING METHOD WAVE not suitable (2) not suitable suitable (3)(4) not recommended (5) not recommended 26 Product specification UDA1345TS (1) REFLOW suitable suitable suitable suitable suitable ...
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... Product specification UDA1345TS DEFINITIONS These products are not Philips Semiconductors ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2002 All rights are reserved. Reproduction in whole or in part is prohibited ...