uda1361ts NXP Semiconductors, uda1361ts Datasheet - Page 6
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uda1361ts
Manufacturer Part Number
uda1361ts
Description
96 Khz Sampling 24-bit Stereo Audio Adc
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1361TS.pdf
(20 pages)
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Philips Semiconductors
Table 4 Decimation filter characteristic
DC cancellation filter
A IIR high-pass filter is provided to remove unwanted
DC components. The filter characteristics are given in
Table 5.
Table 5 DC cancellation filter characteristic
Serial interface formats
2002 Nov 25
handbook, full pagewidth
Pass-band ripple 0 to 0.45f
Pass-band droop 0.45f
Stop band
Dynamic range
Pass-band ripple
Pass-band gain
Droop
Attenuation
at DC
Dynamic range
96 kHz sampling 24-bit stereo audio ADC
ITEM
ITEM
DATA
DATA
BCK
BCK
WS
WS
MSB
1
1
>0.55 f
0 to 0.45 f
at 0.00045f
at 0.00000036f
0 to 0.45f
MSB
B2
CONDITION
CONDITION
2
2
s
LEFT
LEFT
B2
s
3
3
s
s
s
s
s
>135
none
0
>40
>135
0.01
0.2
70
0.031
VALUE (dB)
VALUE (dB)
Fig.3 Serial interface formats.
MSB-JUSTIFIED FORMAT
INPUT FORMAT I
LSB
8
8
MSB
LSB
6
1
1
Mute
On recovery from Power-down, the serial data output
DATAO is held LOW until valid data is available from the
decimation filter. This time tracks with the sampling
frequency:
Power-down mode/input voltage control
The PWON pin can control the power saving together with
the optional gain switch for 2 or 1 V (RMS) input.
The UDA1361TS supports 2 V (RMS) input using a series
resistor of 12 k . For the definition of the pin settings for
1 or 2 V (RMS) mode, it is assumed that this resistor is
present as a default component.
Table 6 Power-down/input voltage control
t
MSB
2
=
B2
S-BUS
2
2
12288
--------------- -
RIGHT
RIGHT
f
B2
s
3
3
PWON
, t = 256 ms when f
M
H
L
Power-down mode
0 dB gain
6 dB gain
POWER-DOWN OR GAIN
s
= 48 kHz.
LSB
8
8
UDA1361TS
Product specification
MSB
LSB
MSB
MGT453
B2