MC80364K64L MOSYS, MC80364K64L Datasheet - Page 2

• Manufacturer Part Number: MC80364K64L
• Description: 4Mb (64KX64) Pbsram
• Manufacturer: MOSYS

Table 1. Pin Description
Table 2. Absolute Maximum Ratings
Notes: Max Vih is not to exceed maximum VDDQ
DS10 Rev 1.4 – 12/29/98
66, 67,68, 69, 70, 71, 72, 73, 74, 75, 76,
101, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 15,
107, 108, 111, 112, 117, 118, 119, 120
Symbol
91,92, 93, 94, 95, 96, 97, 98, 99, 100,
62, 61, 60, 57, 56, 55, 54, 53, 51, 50,
79, 80, 81, 82, 83, 84, 85, 86 ,87, 88,
16, 17, 18, 19, 20, 21, 22 ,23, 24, 27,
V DDQ
28, 29, 30, 31, 32, 33, 34, 35, 36, 37
V DD
V ih
V il
Ts
13, 25, 38, 64, 77, 89, 102 128
1, 14, 26, 39, 65, 78, 90, 103,
49, 48, 47, 44, 43, 42
123, 110, 59, 46
122, 109,58, 45
Core Supply Voltage
I/O Supply Voltage
Input High Voltage
Input Low Voltage
Storage Temperature
Pin Number
40, 52
© 1998 MoSys Inc., All Rights Reserved, 1020 Stewart Drive, Sunnyvale, CA 94086
113
114
115
121
124
125
126
127
116
104
105
106
63
41
Parameter
V SSQ -0.5
BW[8:1]#
DQ[63:0]
Symbol
ADSP#
ADSC#
A[15:0]
MODE
BWE#
VDDQ
Min
ADV#
VSSQ
CE2#
CE3#
-65
GW#
VDD
OE#
CLK
CE#
CE2
CE3
VSS
N/C
ZZ
I/O Ground
I/O Supply
3.3 Volts
Ground
V DDQ +0.5
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
-
Max
150
3.6
3.6
Low Power 3.3V/2.5V
Description
Processor Addresses
Processor host bus byte enables.
Global Write from cache controller
Byte Write Enable from controller
Processor host bus clock
ADSP# mask and ADSC# chip enable
Depth expansion chip enable
Depth expansion chip enable
Depth expansion chip enable
Depth expansion chip enable
Asynchronous output enable
Burst address counter advance
ADS# of processor
ADS# of controller
Sleep-mode: ZZ
Data I/O pins
Burst Mode Select
Not connected internally
Power
Ground
I/O Buffer Supply
I/O Buffer Ground
64Kx64 PBSRAM
MC80364K64
Units
V
V
V
V
C
Page 2