pca9541a NXP Semiconductors, pca9541a Datasheet - Page 14
pca9541a
Manufacturer Part Number
pca9541a
Description
2-to-1 I2c-bus Master Selector With Interrupt Logic And Reset
Manufacturer
NXP Semiconductors
Datasheet
1.PCA9541A.pdf
(41 pages)
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Table 12.
[1]
[2]
[3]
Read Control Register performed by the master
Byte
read
Hex
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
Only the 4 LSBs are shown.
x0x0 in binary = 0, 2, 8 or A in hexadecimal
x0x1 in binary = 1, 3, 9 or B in hexadecimal
x1x0 in binary = 4, 6, C or E in hexadecimal
x1x1 in binary = 5, 7, D or F in hexadecimal
x can be either ‘0’ or ‘1’ since those bits are read-only bits.
[1]
Status
bus off
bus off
bus off
bus off
bus on
bus on
bus on
bus on
bus on
bus on
bus on
bus on
bus off
bus off
bus off
bus off
Bus control sequence
has control
no control
no control
has control
has control
no control
no control
has control
has control
no control
no control
has control
has control
no control
no control
has control
NBUSON BUSON NMYBUS MYBUS Byte
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Write Control Register performed by the master
written
Hex
4
4
5
5
4
5
0
1
0
0
1
1
-
-
-
-
[1][2]
Action performed
to take mastership
bus on
bus on, take control
bus on, take control
bus on
no change
take control
take control
no change
no change
take control
take control
no change
bus on
bus on, take control
bus on, take control
bus on
NBUSON
x
x
x
x
x
x
x
x
x
x
x
x
[3]
BUSON NMYBUS
no write required
no write required
no write required
no write required
1
1
1
1
1
1
0
0
0
0
0
0
x
x
x
x
x
x
x
x
x
x
x
x
[3]
MYBUS
0
0
1
1
0
1
0
1
0
0
1
1