pca9547bs NXP Semiconductors, pca9547bs Datasheet - Page 9

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pca9547bs

Manufacturer Part Number
pca9547bs
Description
Pca9547 8-channel I2c-bus Multiplexer With Reset
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
7. Characteristics of the I
PCA9547_2
Product data sheet
7.1.1 START and STOP conditions
7.1 Bit transfer
The I
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P)
Fig 8. Bit transfer
Fig 9. Definition of START and STOP conditions
2
C-bus is for 2-way, 2-line communication between different ICs or modules. The two
SDA
SCL
(seeFigure
START condition
2
SDA
SCL
C-bus
S
Rev. 02 — 12 September 2006
9.)
data valid
data line
stable;
Figure
allowed
change
of data
8-channel I
8).
2
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
C-bus multiplexer with reset
STOP condition
mba607
P
PCA9547
mba608
SDA
SCL
9 of 26

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