pca9673 NXP Semiconductors, pca9673 Datasheet - Page 10

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pca9673

Manufacturer Part Number
pca9673
Description
Remote 16-bit I/o Expander For Fm+ I2c-bus With Interrupt And Reset
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
8. I/O programming
PCA9673_1
Product data sheet
8.1 Quasi-bidirectional I/O architecture
8.2 Writing to the port (Output mode)
The PCA9673’s 16 ports (see
as input or output ports. Input data is transferred from the ports to the microcontroller in
the Read mode (see
(see
Every data transmission from the PCA9673 must consist of an even number of bytes, the
first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third
will be referred to as P07 to P00, and so on.
This quasi-bidirectional I/O can be used as an input or output without the use of a control
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current
source (I
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the
write mode.
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (I
To write, the master (microcontroller) first addresses the slave device. By setting the last
bit of the byte containing the slave address to logic 0 the Write mode is entered. The
PCA9673 acknowledges and the master sends the first data byte for P07 to P00. After the
Fig 14. Device ID field reading
S
START condition
manufacturer name
Figure
M7
= 00000000
1
If more than 2 bytes are read, the slave device loops back to the first byte (manufacturer byte)
and keeps sending data until the master generates a ‘no acknowledge’.
OH
M6 M5 M4
OL
device ID address
1
) to V
) will flow to V
16).
1
1
Remote 16-bit I/O expander for Fm+ I
DD
M3
1
is active. An additional strong pull-up to V
M2 M1 M0
0
Figure
Rev. 01 — 1 February 2007
0
SS
R/W
0
.
17). Output data is transmitted to the ports in the Write mode
A
A
acknowledge from one
or several slave(s)
acknowledge
from master
Figure
C6
A6
the device to be identified
I
2
category identification
C-bus slave address of
A5 A4 A3 A2 A1 A0 X
C5 C4 C3
2) are entirely independent and can be used either
= 0000001
C2
C1 C0 F5
don't care
feature identification
acknowledge from
slave to be identified
A
A
acknowledge
from master
= 000100
2
C-bus with interrupt and reset
F4
1
P3 P2 P1
DD
device ID address
1
(I
1
trt(pu)
1
slave to be identified
P0 R2 R1 R0
PCA9673
1
) allows fast rising
acknowledge from
© NXP B.V. 2007. All rights reserved.
revision = 000
no acknowledge
0
from master
0
R/W
1
condition
002aac334
STOP
A
A
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