pca9633 NXP Semiconductors, pca9633 Datasheet - Page 13

• Manufacturer Part Number: pca9633
• Description: Pca9633 4-bit Fm+ I2c-bus Led Driver
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 9.
Legend: * default value.
[1]
[2]
[3]
[4]
PCA9633_3
Product data sheet
Bit
1 to 0
See
Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9633. Applicable to registers from
02h (PWM0) to 08h (LEDOUT) only.
See
OUTNE[1:0] is only for PCA9633 16-pin version.
Section 7.7 “Using the PCA9633 with and without external drivers”
Section 7.4 “Active LOW output enable input”
Symbol
OUTNE[1:0]
[3][4]
MODE2 - Mode register 2 (address 01h) bit description
7.3.3 PWM registers 0 to 3, PWMx—Individual brightness control registers
7.3.4 Group duty cycle control, GRPPWM
Access
R/W
Table 10.
Legend: * default value.
A 97 kHz fixed frequency signal is used for each output. Duty cycle is controlled through
256 linear steps from 00h (0 % duty cycle = LED output off) to FFh
(99.6 % duty cycle = LED output at maximum brightness). Applicable to LED outputs
programmed with LDRx = 10 or 11 (LEDOUT register).
Table 11.
Legend: * default value.
When DMBLNK bit (MODE2 register) is programmed with 0, a 190 Hz fixed frequency
signal is superimposed with the 97 kHz individual brightness control signal. GRPPWM is
then used as a global brightness control allowing the LED outputs to be dimmed with the
same value. The value in GRPFREQ is then a ‘Don’t care’.
General brightness for the 4 outputs is controlled through 256 linear steps from 00h
(0 % duty cycle = LED output off) to FFh (99.6 % duty cycle = maximum brightness).
Applicable to LED outputs programmed with LDRx = 11 (LEDOUT register).
duty cycle
Address
02h
03h
04h
05h
Address
06h
Register
PWM0
PWM1
PWM2
PWM3
PWM0 to PWM3 - PWM registers 0 to 3 (address 02h to 05h) bit description
GRPPWM - Group duty cycle control register (address 06h) bit description
Register
GRPPWM
Value
00
01*
10
11
=
------------------------
IDC 7:0
256
Description
When OE = 1 (output drivers not enabled), LEDn = 0.
When OE = 1 (output drivers not enabled):
When OE = 1 (output drivers not enabled), LEDn = high-impedance.
reserved
Rev. 03 — 20 December 2006
LEDn = 1 when OUTDRV = 1
LEDn = high-impedance when OUTDRV = 0 (same as OUTNE[1:0] = 10)
for more details.
Bit
7:0
7:0
7:0
7:0
Bit
7:0
Symbol
IDC0[7:0]
IDC1[7:0]
IDC2[7:0]
IDC3[7:0]
Symbol
GDC[7:0]
for more details.
Access Value
R/W
R/W
R/W
R/W
…continued
Access Value
R/W
0000 0000* PWM0 Individual Duty Cycle
0000 0000* PWM1 Individual Duty Cycle
0000 0000* PWM2 Individual Duty Cycle
0000 0000* PWM3 Individual Duty Cycle
1111 1111
4-bit Fm+ I
Description
Description
GRPPWM register
PCA9633
2
© NXP B.V. 2006. All rights reserved.
C-bus LED driver
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