tda933xh NXP Semiconductors, tda933xh Datasheet - Page 25

• Manufacturer Part Number: tda933xh
• Description: Tda933xh Series I2c-bus Controlled Tv Display Processors
• Manufacturer: NXP Semiconductors

Philips Semiconductors
2002 Jun 04
I
t
t
t
Vertical synchronization and geometry processing
V
V
V
I
t
t
t
V
N
N
V
i(grd)
W(1)
W(2)
d(bk-HD)
i(VD)
r(VD)
f(VD)
W(VD)
D
IL
IH
ERTICAL DIVIDER AND RAMP GENERATOR
saw(p-p)
h
h(nom)
I
SYMBOL
2
INPUT SIGNAL
C-bus controlled TV display processors
guard pulse input current required
to stop the blanking after a vertical
blanking period
pulse width in 1f
pulse width in 2f
delay between start H
start of clamp pulse
LOW-level of input voltage
HIGH-level of input voltage
input current
rise time
fall time
pulse width
number of lines per field
(VGA mode is valid only for
TDA9331H and TDA9332H)
divider value when not locked
(number of lines per field)
(VGA mode is valid only for
TDA9331H and TDA9332H)
sawtooth amplitude
(peak-to-peak value)
;
PIN
23
PARAMETER
H
H
mode
mode
D
pulse and
;
PINS
15
AND
note 38
clamp pulse, 22 LLC
pulses
vertical blanking (50/60 Hz)
clamp pulse, 22 LLC
pulses
clamp pulse, HDTV = 1,
HDCL = 1, 18 LLC; see
Fig.11
1f
2f
2f
14 LLC pulses, see Fig.11
1f
1f
2f
2f
2f
1f
VFF = 0
1f
VFF = 1
2f
2f
1f
2f
VS = 1FH;
C = 100 nF; R = 39 k
vertical blanking;
depends on VWAIT setting;
see Fig.13
16; note 39
H
H
H
H
H
H
H
H
H
H
H
H
H
H
; 2f
; 1f
; 1f
; 1f
; VGA mode
; VGA mode
mode, 37 LLC pulses
mode, 37 LLC pulses
mode, HDCL = 1,
TV mode
VGA mode
VGA mode
or 2f
or 2f
25
V
V
V
V
CONDITIONS
; TV mode
; TV mode
; TV mode; VFF = 0
; TV mode; VFF = 1
H
H
; 2f
; 2f
V
V
; TV mode;
; TV mode;
1.0
2.0
0.5
244
175
244
488
350
MIN.
10
TDA933xH series
3.2
1.6
5.4
2.7
0.94
312.5
262.5
625
525
288
576
3.0
22/17
1.22
TYP.
Preliminary specification
3.5
0.8
5.5
+10
100
100
63.5
511.5
450
511.5
1023.5
900
MAX.
mA
lines
V
V
ns
ns
lines
lines
lines
lines
lines
lines
lines
lines
lines
lines
lines
lines
V
UNIT
s
s
s
s
s
s
A