adv7189b Analog Devices, Inc., adv7189b Datasheet - Page 46

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adv7189b

Manufacturer Part Number
adv7189b
Description
Multiformat Sdtv Video Decoder
Manufacturer
Analog Devices, Inc.
Datasheet

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ADV7189B
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
VIDEO
VIDEO
FIELD
FIELD
NOT VALID FOR USER
HS
VS
HS
VS
PROGRAMMING
VSYNC BY PVBEG[4:0]
ADVANCE BEGIN OF
622
310
ADVANCE BY
PVBEGDELO
ADDITIONAL
DELAY BY
0.5 LINE
VSBHO
1 LINE
YES
1
1
Figure 28. PAL Vsync Begin
311
623
1
624
312
VSYNC BEGIN
0
0
PVBEGSIGN
ODD FIELD?
625
313
Figure 27. PAL Typical Vsync/Field Positions Using Register Writes in
0
0
VSYNC BY PVBEG[4:0]
FIELD 1
1
FIELD 2
314
DELAY BEGIN OF
ADVANCE BY
PVBEGDELE
ADDITIONAL
DELAY BY
0
0.5 LINE
VSBHE
1 LINE
NO
1
1
2
315
PVBEG[4:0] = 0x1
PVBEG[4:0] = 0x1
3
316
Rev. B | Page 46 of 104
317
4
5
318
PVBEGDELO PAL Vsync Begin Delay on Odd Field,
Address 0xE8[7]
When PVBEGDELO is 0 (default), there is no delay.
Setting PVBEGDELO to 1 delays Vsync going high on an odd
field by a line relative to PVBEG.
PVBEGDELE PAL Vsync Begin Delay on Even Field,
Address 0xE8[6]
When PVBEGDELE is 0, there is no delay.
Setting PVBEGDELE to 1 (default) delays Vsync going high on
an even field by a line relative to PVBEG.
PVBEGSIGN PAL Vsync Begin Sign, Address 0xE8[5]
Setting PVBEGSIGN to 0 delays the beginning of Vsync. Set for
user manual programming.
Setting PVBEGSIGN to 1 (default) advances the beginning of
Vsync. Not recommended for user programming.
PVBEG[4:0] PAL Vsync Begin, Address 0xE8[4:0]
The default value of PVBEG is 00101, indicating the PAL Vsync
begin position.
For all NTSC/PAL Vsync timing controls, both the V bit in the
AV code and the Vsync on the VS pin are modified.
PVEND[4:0] = 0x4
PVEND[4:0] = 0x4
319
6
7
320
8
321
PFTOG[4:0] = 0x6
T able 57
2 1 6 H
PFTOG[4:0] = 0x6
322
9
323
10
11
336
337
23
24

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