ad8432acpz Analog Devices, Inc., ad8432acpz Datasheet - Page 6

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ad8432acpz

Manufacturer Part Number
ad8432acpz
Description
Dual Lna With Selectable Gain And Input Impedance
Manufacturer
Analog Devices, Inc.
Datasheet

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AD8432
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 3. Pin Function Descriptions
Pin No.
1
2
3, 7
4
5
6
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Mnemonic
INH1
INL1
IND1, IND2
COMM
INL2
INH2
VPS2
OPH2
GOH2
GMH2
GML2
GOL2
OPL2
COM2
COM1
OPL1
GOL1
GML1
GMH1
GOH1
OPH1
VPS1
ENB
EPAD
Description
Noninverting Input of LNA1
Inverting Input of LNA1 (AC-Coupled to Ground)
Integrated Input Clamping Back-to-Back Diodes
Input Ground
Inverting Input of LNA2
Noninverting Input of LNA2
5 V Supply for LNA2
Noninverting Output of LNA2
Gain Setting Pin for LNA2
Gain Setting Pin for LNA2
Gain Setting Pin for LNA2
Gain Setting Pin for LNA2
Inverting Output of LNA2
LNA2 Output Ground
LNA1 Output Ground
Inverting Output of LNA1
Gain Setting Pin for LNA1
Gain Setting Pin for LNA1
Gain Setting Pin for LNA1
Gain Setting Pin for LNA1
Noninverting Output of LNA1
5 V Supply of LNA1
Enable
Exposed pad must be connected to ground.
NOTES
1. EXPOSED PAD MUST BE CONNECTED
TO GROUND.
Figure 2. Pin Configuration
Rev. PrA | Page 6 of 12
(Not to Scale)
AD8432
TOP VIEW
Preliminary Technical Data

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