x95840 Intersil Corporation, x95840 Datasheet - Page 5

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x95840

Manufacturer Part Number
x95840
Description
Quad Digital Controlled Potentionmeters Xdcp? ; Low Noise/low Power/i2c? Bus/256 Taps
Manufacturer
Intersil Corporation
Datasheet

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Operating Specifications
SDA vs SCL Timing
(Notes 15, 16)
Rpu (Note 15) SDA and SCL Bus Pull-up
t
Cb (Note 15)
DH
t
t
R
F
SYMBOL
t
t
t
t
t
t
HD:WPA
HD:STO
SU:WPA
SU:DAT
HD:DAT
SU:STO
(Note 15)
(Note 15)
(Note 15) Output Data Hold Time
(OUTPUT TIMING)
t
(INPUT TIMING)
WP
Input Data Setup Time
Input Data Hold Time
STOP Condition Setup Time From SCL rising edge crossing 70% of V
STOP Condition Setup Time From SDA rising edge to SCL falling edge. Both
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive Loading of SDA
or SCL
Resistor Off-chip
Non-volatile Write Cycle
Time
A2, A1, A0, and WP Setup
Time
A2, A1, A0, and WP Hold
Time
SDA
SCL
SDA
t
SU:STA
PARAMETER
5
Over the recommended operating conditions unless otherwise specified. (Continued)
t
HD:STA
t
F
From SDA exiting the 30% to 70% of V
SCL rising edge crossing 30% of V
From SCL rising edge crossing 70% of V
entering the 30% to 70% of V
rising edge crossing 30% of V
crossing 70% of V
From SCL falling edge crossing 30% of V
enters the 30% to 70% of V
From 30% to 70% of V
From 70% to 30% of V
Total on-chip and off-chip
Maximum is determined by t
For Cb = 400pF, max is about 2~2.5kΩ.
For Cb = 40pF, max is about 15~20kΩ
Before START condition
After STOP condition
t
SU:DAT
t
HIGH
TEST CONDITIONS
CC
X95840
.
CC
CC
t
LOW
CC
R
CC
CC
and t
window.
t
HD:DAT
.
window.
CC
F
.
CC
CC
CC
CC
window, to
, until SDA
, to SDA
t
to SDA
R
t
AA
0.1 * Cb
0.1 * Cb
t
DH
20 +
20 +
MIN
100
600
600
600
600
10
0
0
1
(Note 1)
TYP
12
t
BUF
t
MAX
SU:STO
250
250
400
20
July 5, 2006
UNITS
FN8213.2
ms
ns
ns
ns
ns
ns
ns
ns
pF
ns
ns

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