dac1003d160 NXP Semiconductors, dac1003d160 Datasheet
dac1003d160
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dac1003d160 Summary of contents
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... The DAC1003D160 is optimized to reduce architecture complexity and overall system cost. The Digital-to-Analog Converter (DAC) leads dynamic performance in multi-carrier support because of its direct IF conversion capabilities. With an internal sampling rate up to 160 MHz, the DAC1003D160 is an extremely competitive solution for broadband wireless systems transmitters, as well as a wide range of applications. 2. Features ...
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... CLK CLOCK 6 DRIVER CLKN LATCH i.c. 10 CCD (1) (2) (3) V AGND DGND DEC CCA Rev. 02 — 13 August 2008 DAC1003D160 V U/I CCA 60 73 DAC 72 10 FIR (CLK 2) INTERNAL 58 PLL (CLK 2) BAND GAP (CLK DAC 68 10 FIR U/I ...
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... S analog supply voltage 4 G analog ground 5 I clock input 6 I complementary clock input 7 G analog ground 8 O internally connected; leave open 9 G digital ground Rev. 02 — 13 August 2008 DAC1003D160 60 IVIRES 59 QVIRES 58 GAPOUT 57 GAPD 56 DGND 55 DGND 54 DGND 53 DGND 52 DGND 51 V CCD ...
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... I Q data input bit 0 (LSB decoupling node 44 G digital ground 45 I not connected 46 I not connected 47 I not connected 48 I not connected 49 G digital ground 50 G digital ground Rev. 02 — 13 August 2008 DAC1003D160 © NXP B.V. 2008. All rights reserved ...
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... I DAC output current DAC output current 74 G analog ground 75 G analog ground 76 S analog supply voltage 77 G analog ground 78 O decoupling node 79 G analog ground 80 S analog supply voltage Rev. 02 — 13 August 2008 DAC1003D160 © NXP B.V. 2008. All rights reserved ...
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... NXP Semiconductors 7. Functional description The DAC1003D160 is a segmented architecture composed of a 7-bit thermometer sub-DAC and the remaining 3-bit in a binary weighted sub-DAC. The device produces two complementary current outputs on both channels, respectively pins IOUT/IOUTN and QOUT/QOUTN which need to be connected via a load resistor to the ground ...
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... DAGND storage temperature ambient temperature junction temperature Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from case to ambient = 25 C; dynamic parameters measured using output schematic given in amb Conditions Rev. 02 — 13 August 2008 DAC1003D160 Min [1] 0.3 [1] 0.3 150 0.3 0.3 0 Conditions Typ in free air 27 ...
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... Figure 5 t 0.5 LSB o Figure 6 and 7 and Table 0.005 dB attenuation data clk attenuation data clk 0 data clk Rev. 02 — 13 August 2008 DAC1003D160 = +85 C; typical values measured at Min Typ Max - 422 540 - 1. 1 [1] - 150 - [1] - ...
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... Msample/ Nyquist clk f = 2.5 MHz MHz MHz o baseband; 5 MHz channel spacing 3.84 MHz f = 2.5 MHz MHz o Band gap Band gap input/output (GAPOUT) output (V GAPOUT input Rev. 02 — 13 August 2008 DAC1003D160 = +85 C; typical values measured at amb Min Typ Max - 120 - - 0.3 - 5.4 - +5 ...
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... NXP Semiconductors CLKN CLK IOUT/IOUTN, QOUT/QOUTN Fig 5. Input timing diagram DAC1003D160_2 Product data sheet Dual 10 bits DAC 160 MHz interpolation t su(i) t h(i) Rev. 02 — 13 August 2008 DAC1003D160 50 % 014aaa534 © NXP B.V. 2008. All rights reserved ...
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... Dual 10 bits DAC 160 MHz interpolation 014aaa535 normalized output 0.6 0.8 1 clk Fig 7. FIR filter impulse response Interpolation FIR filter coefficient Coefficient H(43) H(42) H(41) H(40) H(39) H(38) H(37) H(36) H(35) H(34) H(33) H(32) H(31) H(30) H(29) H(28) H(27) H(26) H(25) H(24) H(23) - Rev. 02 — 13 August 2008 DAC1003D160 0.6 0.4 0 Value 138 0 248 0 419 0 678 0 1083 0 1776 0 3282 0 10364 16384 014aaa536 40 t (sample) © ...
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... AGND 014aaa539 Fig 8. Single-ended clock schematic DAC1003D160_2 Product data sheet Dual 10 bits DAC 160 MHz interpolation DAC1003D160 V Fig 9. Differential clock schematic Rev. 02 — 13 August 2008 DAC1003D160 AGND DAC1003D160 1 k CLK 100 CCA 100 nF AGND 1 k CLKN 100 ...
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... Dual 10 bits DAC 160 MHz interpolation 50 50 (RLOAD) (RLOAD) 1:1 1:1 AGND AGND AGND AGND AGND AGND AGND AGND 3 DAC1003D160 C DGND DGND Rev. 02 — 13 August 2008 DAC1003D160 AGND AGND AGND AGND 3 1.5 k IVIRES 60 1.5 k QVIRES 59 GAPOUT 58 GAPD 57 DGND 56 DGND 55 DGND 54 DGND 53 ...
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... Product data sheet Dual 10 bits DAC 160 MHz interpolation Alternative parts Description Dual 14 bits DAC, with 2 interpolating Dual 12 bits DAC, with 2 interpolating Rev. 02 — 13 August 2008 DAC1003D160 Sampling frequency [1] 160 MHz [1] 160 MHz © NXP B.V. 2008. All rights reserved ...
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... scale (1) ( 0.20 12.1 6.05 12.1 6.05 0.5 0.09 11.9 5.95 11.9 5.95 REFERENCES JEDEC JEITA MS-026 Rev. 02 — 13 August 2008 DAC1003D160 detail 14.15 14.15 0.75 1 0.2 0.08 13.85 13.85 0.45 EUROPEAN PROJECTION SOT841 ...
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... Product data sheet Dual 10 bits DAC 160 MHz interpolation Abbreviations Description Finite Impulse Response Intermediate Frequency Least Significant Bit Most Significant Bit Phase-Locked Loop Positive-Metal Oxide Semiconductor Rev. 02 — 13 August 2008 DAC1003D160 © NXP B.V. 2008. All rights reserved ...
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... DAC1003D160_2 Product data sheet Dual 10 bits DAC 160 MHz interpolation Data sheet status Change notice Product data sheet - in Table 5. s Figure 10. Product data sheet - Rev. 02 — 13 August 2008 DAC1003D160 Supersedes DAC1003D160_1 - © NXP B.V. 2008. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. http://www.nxp.com salesaddresses@nxp.com Rev. 02 — 13 August 2008 DAC1003D160 © NXP B.V. 2008. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com All rights reserved. Date of release: 13 August 2008 Document identifier: DAC1003D160_2 ...