dac1405d650 NXP Semiconductors, dac1405d650 Datasheet - Page 28

• Manufacturer Part Number: dac1405d650
• Description: Dual 14-bit Dac, Up To 650 Msps; 2? 4? And 8? Interpolating
• Manufacturer: NXP Semiconductors

NXP Semiconductors
DAC1405D650_1
Product data sheet
10.10.2 Full-scale current adjustment
The reference current is generated via an external resistor of 910
pin VIRES. A control amplifier sets the appropriate full-scale current (I
(see
This configuration is optimum for temperature drift compensation because the bandgap
reference voltage can be matched to the voltage across the feedback resistor.
The DAC current can also be set by applying an external reference voltage to the
non-inverting input pin GAPOUT and disabling the internal bandgap reference voltage
with GAP_PD (register 00h[0]; see
description”).
The default full-scale current (I
user to both DACs independently via the serial interface from 1.6 mA to 22 mA, +/- 10 %.
The settings applied to DAC_A_GAIN_COARSE[3:0] (register 0Ah; see
“DAC_A_Cfg_2 register (address 0Ah) bit description”
“DAC_A_Cfg_3 register (address 0Bh) bit
COARSE[3:0] (register 0Dh; see
description”
description”) define the coarse variation of the full-scale current (see
coarse
Table 36.
Default settings are shown highlighted.
DAC_GAIN_COARSE[3:0]
Decimal
0
1
2
3
4
5
6
7
Fig 11. Internal reference configuration
Figure 11 “Internal reference
adjustment”).
I
O(fs)
and register 0Eh; see
coarse adjustment
Rev. 01 — 4 May 2009
AGND
AGND
Dual 14-bit DAC, up to 650 Msps; 2 4 and 8 interpolating
Binary
0000
0001
0010
0011
0100
0101
0110
0111
O(fs)
Table 23 “DAC_B_Cfg_2 register (address 0Dh) bit
100 nF
910
(1 %)
) is 20 mA but further adjustments can be made by the
configuration”).
Table 24 “DAC_B_Cfg_3 register (address 0Eh) bit
Table 10 “COMMon register (address 00h) bit
GAPOUT
VIRES
DAC1405D650
description”) and to DAC_B_GAIN
BANDGAP
REF.
and register 0Bh; see
CURRENT
SOURCES
ARRAY
001aaj816
DAC
DAC1405D650
I
1.6
3.0
4.4
5.8
7.2
8.6
10.0
11.4
O(fs)
(mA)
(1 %) connected to
Table 36 “I
O(fs)
© NXP B.V. 2009. All rights reserved.
Table 20
) for both DACs
Table 21
O(fs)
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