atf22lv10c-15xi ATMEL Corporation, atf22lv10c-15xi Datasheet - Page 8

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atf22lv10c-15xi

Manufacturer Part Number
atf22lv10c-15xi
Description
High- Performance Ee Pld
Manufacturer
ATMEL Corporation
Datasheet

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10. Compiler Mode Selection
11. Functional Logic Diagram Description
8
ATF22LV10C
Figure 10-1. Compiler Mode Selection
Note:
The functional logic diagram describes the ATF22LV10C architecture.
The ATF22LV10C has 12 inputs and 10 I/O macrocells. Each macrocell can be configured into
one of four output configurations: active high/low, registered/combinatorial output.The universal
architecture of the ATF22LV10C can be programmed to emulate most 24-pin PAL devices.
Unused product terms are automatically disabled by the compiler to decrease power consump-
tion. A security fuse, when programmed, protects the contents of the ATF22LV10C. Eight bytes
(64 fuses) of User Signature are accessible to the user for purposes such as storing project
name, part number, revision or date. The User Signature is accessible regardless of the state of
the security fuse.
WINCUPL
Synario
1. These device types will create a JEDEC file which when programmed in an ATF22V10C
device will enable the power-down mode feature. All other devices have this feature disabled.
ATF22V10C (PLCC)
ATF22C10C (DIP)
(5828 Fuses)
P22V10LCC
PAL Mode
P22V10
ATF22V10C PLCC (UES)
ATF22C10C DIO (UES)
(5892 Fuses)
G22V10LCC
GAL Mode
G22V10
ATF22C10V PLCC (PWD)
ATF22C10C DIP (PWD)
Power-down Mode
G22V10CPLCC
(5893 Fuses)
G22V10CP
0780L–PLD–12/05
(1)

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