dsp56852 Freescale Semiconductor, Inc, dsp56852 Datasheet - Page 3

• Manufacturer Part Number: dsp56852
• Description: 56800e 16-bit Digital Signal Controllers Digital Signal Controller
• Manufacturer: Freescale Semiconductor, Inc

Freescale Semiconductor
DSP56852 General Description
• 120 MIPS at 120MHz
• 6K x 16-bit Program SRAM
• 4K x 16-bit Data SRAM
• 1K x 16-bit Boot ROM
• 21 External Memory Address lines, 16 data lines and
• One (1) Serial Port Interface (SPI) or one (1) Improved
• One (1) Serial Communication Interface (SCI)
four chip selects
Synchronous Serial Interface (ISSI)
D13-15 muxed (Mode A,B,C)
A17-18 muxed (timer pins)
CS[2:0] muxed (GPIOA)
A19 muxed (CS3)
D0-D12[12:0]
WR Enable
RD Enable
A0-16
Decoding
Peripherals
External Address
External Data
Bus Switch
Bus Switch
Bus Control
Program Memory
6144 x 16 SRAM
4096 x 16 SRAM
1024 x 16 ROM
Data Memory
Memory
Boot ROM
Peripheral
Decoder
Address
Address
Decoder
System
Interface Unit
External Bus
56852 Technical Data, Rev. 8
56852 Block Diagram
Hardware Looping Unit
System
Device
Program Controller
XDB2
XAB1
XAB2
PAB
PDB
CDBR
CDBW
Peripheral
GPIOE
SCI or
Selects
Device
2
and
1 Quad
or A17,
Timer
A18
PAB
PDB
CDBR
CDBW
2
IPBus Bridge (IPBB)
RW
Control
GPIOC
GPIOC
SSI or
SSI or
SPI or
SPI or
Generation Unit
Enhanced
• Interrupt Controller
• General Purpose 16-bit Quad Timer
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
• Computer Operating Properly (COP)/Watchdog Timer
• 81-pin MAPBGA package
• Up to 11 GPIO
Address
6
JTAG/
OnCE
6
unobtrusive, real-time debugging
IPAB
Watch-
COP/
dog
IRQA
IPWDB
Controller
V
Interrupt
6
DDIO
Three 16-bit Input Registers
16 x 16 + 36 → 36-Bit MAC
Four 36-bit Accumulators
System
Control
IRQB
Bus
3
V
DD
Data ALU
IPRDB
RESET
56800E Core
muxed (D13-15)
V
Integration
SSIO
System
Module
6
16-Bit
MODE
resets
Clock
3
R/W Control
V
3
SS
P
O
R
CLKO
muxed ( A20 )
V
DDA
Generator
Manipulation
Clock
V
SSA
PLL
Unit
Bit
O
S
C
EXTAL
XTAL
3