dsp56001 Freescale Semiconductor, Inc, dsp56001 Datasheet - Page 6

• Manufacturer Part Number: dsp56001
• Description: Available In An 88 Pin Ceramic Through-hole Package.
• Manufacturer: Freescale Semiconductor, Inc

MOTOROLA
6
Power Considerations
The average chip-junction temperature, T
Where:
For most applications P
between P
Solving equations (1) and (2) for K gives:
Where K is a constant pertaining to the particular part. K can be determined from equation (2) by measuring P
known T
T
heat flow from the semiconductor junction to the package (case) surface (
terms are related by the equation:
management techniques as heat sinks, ambient air cooling, and thermal convection. Thus, good thermal management on the part of
the user can significantly reduce C
lower semiconductor junction temperature. Values for thermal resistance presented in this document, unless estimated, were derived
using the procedure described in Motorola Reliability Report 7843, “Thermal Resistance Measurement Method for MC68XX
Microcomponent Devices”, and are provided for design purposes only. Thermal measurements are complex and dependent on
procedure and setup. User-derived values for thermal resistance may differ.
Layout Practices
Each Vcc pin on the DSP56001 should be provided with a low-impedance path to + 5 volts. Each GND pin should likewise be provided
with a low-impedance path to ground. The power supply pins drive four distinct groups of logic on chip. They are:
A
JC
. The total thermal resistance of a package (
T
T
P
P
P
P
K = P
is device related and cannot be influenced by the user. However, C
J
A
JA
D
INT
I/O
D
JA
= T
= Ambient Temperature, C
= P
= K/(T
=
= Package Thermal Resistance, Junction-to-Ambient, C/W
= Power Dissipation on Input and Output Pins - User Determined
A
= I
D
. Using this value of K, the values of P
A
INT
D
CC
JC
+ (P
and T
(T
J
+ P
+ C
+ 273 C)
A
D
Vcc, Watts - Chip Internal Power
+ 273 C) +
35, 36, 128, 129 33, 34, 130, 131
63, 64
100, 101
12, 13
I/O
A
J
G12,C6
L8
G3
C9
(if P
JA
Vcc
Vcc
)
I/O
I/O
is neglected) is:
<< P
JA
Power and Ground Connections for CQFP and PQFP
DSP56001 Electrical Characteristics
INT
A
55, 56, 73, 74
90, 91, 111, 112
23, 24
P
and can be neglected; however, P
so that
D
G11,B7
L6,L9
D3,J3
E11
2
GND
Power and Ground Connections for PGA
GND
J
, in C can be obtained from:
JA
D
approximately equals
JA
and T
) can be separated into two components,
Internal Logic supply pins
Address bus output buffer supply pins
Data bus output buffer supply pins
Port B and C output buffer supply pins
Port B and C output buffer supply pins
Internal Logic supply pins
Address bus output buffer supply pins
Data bus output buffer supply pins
J
can be obtained by solving equations (1) and (2) iteratively for any value of
Function
Function
I/O
A
JC
is user dependent and can be minimized by such thermal
. Substitution of
+ P
JC
) and from the case to the outside ambient (C
INT
(1)
(3)
(2)
(4)
must not exceed P
JC
JC
for
and C
JA
d
in equation (1) will result in a
. An appropriate relationship
A
, representing the barrier to
D
(at equilibrium) for a
DSP56001
A
). These